memory: tegra: Add dummy implementation on Tegra194
With the introduction of commit9365bf006f
("PCI: tegra194: Add interconnect support in Tegra234"), the PCI driver on Tegra194 and later requires an interconnect provider. However, a provider is currently only exposed on Tegra234 and this causes PCI on Tegra194 to defer probe indefinitely. Fix this by adding a dummy implementation on Tegra194. This allows nodes to be provided to interconnect consumers, but doesn't do any bandwidth accounting or frequency scaling. Fixes:9365bf006f
("PCI: tegra194: Add interconnect support in Tegra234") Reported-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Sumit Gupta <sumitg@nvidia.com> Tested-by: Sumit Gupta <sumitg@nvidia.com> Link: https://lore.kernel.org/r/20230629160132.768940-1-thierry.reding@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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06c2afb862
Коммит
d1478aea64
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@ -755,6 +755,43 @@ const char *const tegra_mc_error_names[8] = {
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[6] = "SMMU translation error",
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};
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struct icc_node *tegra_mc_icc_xlate(struct of_phandle_args *spec, void *data)
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{
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struct tegra_mc *mc = icc_provider_to_tegra_mc(data);
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struct icc_node *node;
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list_for_each_entry(node, &mc->provider.nodes, node_list) {
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if (node->id == spec->args[0])
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return node;
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}
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/*
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* If a client driver calls devm_of_icc_get() before the MC driver
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* is probed, then return EPROBE_DEFER to the client driver.
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*/
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return ERR_PTR(-EPROBE_DEFER);
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}
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static int tegra_mc_icc_get(struct icc_node *node, u32 *average, u32 *peak)
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{
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*average = 0;
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*peak = 0;
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return 0;
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}
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static int tegra_mc_icc_set(struct icc_node *src, struct icc_node *dst)
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{
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return 0;
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}
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const struct tegra_mc_icc_ops tegra_mc_icc_ops = {
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.xlate = tegra_mc_icc_xlate,
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.aggregate = icc_std_aggregate,
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.get_bw = tegra_mc_icc_get,
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.set = tegra_mc_icc_set,
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};
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/*
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* Memory Controller (MC) has few Memory Clients that are issuing memory
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* bandwidth allocation requests to the MC interconnect provider. The MC
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@ -1355,6 +1355,7 @@ const struct tegra_mc_soc tegra194_mc_soc = {
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MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM,
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.has_addr_hi_reg = true,
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.ops = &tegra186_mc_ops,
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.icc_ops = &tegra_mc_icc_ops,
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.ch_intmask = 0x00000f00,
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.global_intstatus_channel_shift = 8,
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};
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@ -889,27 +889,6 @@ static int tegra234_mc_icc_aggregate(struct icc_node *node, u32 tag, u32 avg_bw,
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return 0;
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}
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static struct icc_node*
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tegra234_mc_of_icc_xlate(struct of_phandle_args *spec, void *data)
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{
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struct tegra_mc *mc = icc_provider_to_tegra_mc(data);
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unsigned int cl_id = spec->args[0];
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struct icc_node *node;
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list_for_each_entry(node, &mc->provider.nodes, node_list) {
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if (node->id != cl_id)
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continue;
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return node;
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}
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/*
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* If a client driver calls devm_of_icc_get() before the MC driver
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* is probed, then return EPROBE_DEFER to the client driver.
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*/
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return ERR_PTR(-EPROBE_DEFER);
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}
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static int tegra234_mc_icc_get_init_bw(struct icc_node *node, u32 *avg, u32 *peak)
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{
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*avg = 0;
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@ -919,7 +898,7 @@ static int tegra234_mc_icc_get_init_bw(struct icc_node *node, u32 *avg, u32 *pea
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}
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static const struct tegra_mc_icc_ops tegra234_mc_icc_ops = {
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.xlate = tegra234_mc_of_icc_xlate,
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.xlate = tegra_mc_icc_xlate,
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.aggregate = tegra234_mc_icc_aggregate,
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.get_bw = tegra234_mc_icc_get_init_bw,
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.set = tegra234_mc_icc_set,
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@ -175,6 +175,9 @@ struct tegra_mc_icc_ops {
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int (*get_bw)(struct icc_node *node, u32 *avg, u32 *peak);
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};
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struct icc_node *tegra_mc_icc_xlate(struct of_phandle_args *spec, void *data);
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extern const struct tegra_mc_icc_ops tegra_mc_icc_ops;
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struct tegra_mc_ops {
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/*
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* @probe: Callback to set up SoC-specific bits of the memory controller. This is called
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