serial: 8250_pci: Merge 8250_moxa to 8250_pci
Moxa serial boards only need a special setup function, we can use generic 8250 framework for other parts. So let's merge 8250_moxa to 8250_pci. Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com> Link: https://lore.kernel.org/r/20190816165124.16942-1-kai.heng.feng@canonical.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -1,155 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* 8250_moxa.c - MOXA Smartio/Industio MUE multiport serial driver.
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*
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* Author: Mathieu OTHACEHE <m.othacehe@gmail.com>
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*/
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#include <linux/module.h>
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#include <linux/pci.h>
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#include "8250.h"
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#define PCI_DEVICE_ID_MOXA_CP102E 0x1024
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#define PCI_DEVICE_ID_MOXA_CP102EL 0x1025
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#define PCI_DEVICE_ID_MOXA_CP104EL_A 0x1045
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#define PCI_DEVICE_ID_MOXA_CP114EL 0x1144
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#define PCI_DEVICE_ID_MOXA_CP116E_A_A 0x1160
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#define PCI_DEVICE_ID_MOXA_CP116E_A_B 0x1161
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#define PCI_DEVICE_ID_MOXA_CP118EL_A 0x1182
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#define PCI_DEVICE_ID_MOXA_CP118E_A_I 0x1183
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#define PCI_DEVICE_ID_MOXA_CP132EL 0x1322
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#define PCI_DEVICE_ID_MOXA_CP134EL_A 0x1342
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#define PCI_DEVICE_ID_MOXA_CP138E_A 0x1381
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#define PCI_DEVICE_ID_MOXA_CP168EL_A 0x1683
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#define MOXA_BASE_BAUD 921600
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#define MOXA_UART_OFFSET 0x200
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#define MOXA_BASE_BAR 1
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struct moxa8250_board {
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unsigned int num_ports;
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int line[0];
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};
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enum {
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moxa8250_2p = 0,
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moxa8250_4p,
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moxa8250_8p
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};
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static struct moxa8250_board moxa8250_boards[] = {
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[moxa8250_2p] = { .num_ports = 2},
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[moxa8250_4p] = { .num_ports = 4},
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[moxa8250_8p] = { .num_ports = 8},
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};
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static int moxa8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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{
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struct uart_8250_port uart;
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struct moxa8250_board *brd;
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void __iomem *ioaddr;
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resource_size_t baseaddr;
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unsigned int i, nr_ports;
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unsigned int offset;
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int ret;
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brd = &moxa8250_boards[id->driver_data];
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nr_ports = brd->num_ports;
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ret = pcim_enable_device(pdev);
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if (ret)
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return ret;
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brd = devm_kzalloc(&pdev->dev, sizeof(struct moxa8250_board) +
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sizeof(unsigned int) * nr_ports, GFP_KERNEL);
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if (!brd)
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return -ENOMEM;
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brd->num_ports = nr_ports;
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memset(&uart, 0, sizeof(struct uart_8250_port));
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uart.port.dev = &pdev->dev;
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uart.port.irq = pdev->irq;
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uart.port.uartclk = MOXA_BASE_BAUD * 16;
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uart.port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ;
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baseaddr = pci_resource_start(pdev, MOXA_BASE_BAR);
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ioaddr = pcim_iomap(pdev, MOXA_BASE_BAR, 0);
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if (!ioaddr)
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return -ENOMEM;
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for (i = 0; i < nr_ports; i++) {
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/*
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* MOXA Smartio MUE boards with 4 ports have
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* a different offset for port #3
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*/
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if (nr_ports == 4 && i == 3)
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offset = 7 * MOXA_UART_OFFSET;
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else
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offset = i * MOXA_UART_OFFSET;
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uart.port.iotype = UPIO_MEM;
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uart.port.iobase = 0;
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uart.port.mapbase = baseaddr + offset;
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uart.port.membase = ioaddr + offset;
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uart.port.regshift = 0;
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dev_dbg(&pdev->dev, "Setup PCI port: port %lx, irq %d, type %d\n",
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uart.port.iobase, uart.port.irq, uart.port.iotype);
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brd->line[i] = serial8250_register_8250_port(&uart);
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if (brd->line[i] < 0) {
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dev_err(&pdev->dev,
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"Couldn't register serial port %lx, irq %d, type %d, error %d\n",
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uart.port.iobase, uart.port.irq,
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uart.port.iotype, brd->line[i]);
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break;
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}
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}
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pci_set_drvdata(pdev, brd);
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return 0;
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}
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static void moxa8250_remove(struct pci_dev *pdev)
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{
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struct moxa8250_board *brd = pci_get_drvdata(pdev);
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unsigned int i;
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for (i = 0; i < brd->num_ports; i++)
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serial8250_unregister_port(brd->line[i]);
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}
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#define MOXA_DEVICE(id, data) { PCI_VDEVICE(MOXA, id), (kernel_ulong_t)data }
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static const struct pci_device_id pci_ids[] = {
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MOXA_DEVICE(PCI_DEVICE_ID_MOXA_CP102E, moxa8250_2p),
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MOXA_DEVICE(PCI_DEVICE_ID_MOXA_CP102EL, moxa8250_2p),
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MOXA_DEVICE(PCI_DEVICE_ID_MOXA_CP104EL_A, moxa8250_4p),
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MOXA_DEVICE(PCI_DEVICE_ID_MOXA_CP114EL, moxa8250_4p),
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MOXA_DEVICE(PCI_DEVICE_ID_MOXA_CP116E_A_A, moxa8250_8p),
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MOXA_DEVICE(PCI_DEVICE_ID_MOXA_CP116E_A_B, moxa8250_8p),
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MOXA_DEVICE(PCI_DEVICE_ID_MOXA_CP118EL_A, moxa8250_8p),
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MOXA_DEVICE(PCI_DEVICE_ID_MOXA_CP118E_A_I, moxa8250_8p),
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MOXA_DEVICE(PCI_DEVICE_ID_MOXA_CP132EL, moxa8250_2p),
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MOXA_DEVICE(PCI_DEVICE_ID_MOXA_CP134EL_A, moxa8250_4p),
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MOXA_DEVICE(PCI_DEVICE_ID_MOXA_CP138E_A, moxa8250_8p),
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MOXA_DEVICE(PCI_DEVICE_ID_MOXA_CP168EL_A, moxa8250_8p),
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{0}
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};
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MODULE_DEVICE_TABLE(pci, pci_ids);
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static struct pci_driver moxa8250_pci_driver = {
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.name = "8250_moxa",
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.id_table = pci_ids,
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.probe = moxa8250_probe,
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.remove = moxa8250_remove,
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};
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module_pci_driver(moxa8250_pci_driver);
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MODULE_AUTHOR("Mathieu OTHACEHE");
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MODULE_DESCRIPTION("MOXA SmartIO MUE driver");
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MODULE_LICENSE("GPL v2");
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@ -1827,6 +1827,22 @@ pci_sunix_setup(struct serial_private *priv,
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return setup_port(priv, port, bar, offset, 0);
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}
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static int
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pci_moxa_setup(struct serial_private *priv,
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const struct pciserial_board *board,
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struct uart_8250_port *port, int idx)
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{
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unsigned int bar = FL_GET_BASE(board->flags);
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int offset;
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if (board->num_ports == 4 && idx == 3)
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offset = 7 * board->uart_offset;
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else
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offset = idx * board->uart_offset;
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return setup_port(priv, port, bar, offset, 0);
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}
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#define PCI_VENDOR_ID_SBSMODULARIO 0x124B
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#define PCI_SUBVENDOR_ID_SBSMODULARIO 0x124B
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#define PCI_DEVICE_ID_OCTPRO 0x0001
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@ -1931,6 +1947,18 @@ pci_sunix_setup(struct serial_private *priv,
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#define PCIE_DEVICE_ID_NI_PXIE8431_4858 0x74C4
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#define PCIE_DEVICE_ID_NI_PXIE8431_48516 0x74C3
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#define PCI_DEVICE_ID_MOXA_CP102E 0x1024
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#define PCI_DEVICE_ID_MOXA_CP102EL 0x1025
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#define PCI_DEVICE_ID_MOXA_CP104EL_A 0x1045
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#define PCI_DEVICE_ID_MOXA_CP114EL 0x1144
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#define PCI_DEVICE_ID_MOXA_CP116E_A_A 0x1160
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#define PCI_DEVICE_ID_MOXA_CP116E_A_B 0x1161
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#define PCI_DEVICE_ID_MOXA_CP118EL_A 0x1182
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#define PCI_DEVICE_ID_MOXA_CP118E_A_I 0x1183
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#define PCI_DEVICE_ID_MOXA_CP132EL 0x1322
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#define PCI_DEVICE_ID_MOXA_CP134EL_A 0x1342
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#define PCI_DEVICE_ID_MOXA_CP138E_A 0x1381
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#define PCI_DEVICE_ID_MOXA_CP168EL_A 0x1683
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/* Unknown vendors/cards - this should not be in linux/pci_ids.h */
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#define PCI_SUBDEVICE_ID_UNKNOWN_0x1584 0x1584
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@ -2781,6 +2809,16 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = {
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.setup = pci_fintek_setup,
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.init = pci_fintek_init,
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},
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/*
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* MOXA
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*/
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{
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.vendor = PCI_VENDOR_ID_MOXA,
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.device = PCI_ANY_ID,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.setup = pci_moxa_setup,
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},
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/*
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* Default "match everything" terminator entry
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@ -2987,6 +3025,9 @@ enum pci_board_num_t {
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pbn_sunix_pci_4s,
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pbn_sunix_pci_8s,
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pbn_sunix_pci_16s,
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pbn_moxa8250_2p,
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pbn_moxa8250_4p,
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pbn_moxa8250_8p,
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};
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/*
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@ -3798,6 +3839,24 @@ static struct pciserial_board pci_boards[] = {
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.base_baud = 921600,
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.uart_offset = 0x8,
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},
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[pbn_moxa8250_2p] = {
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.flags = FL_BASE1,
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.num_ports = 2,
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.base_baud = 921600,
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.uart_offset = 0x200,
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},
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[pbn_moxa8250_4p] = {
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.flags = FL_BASE1,
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.num_ports = 4,
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.base_baud = 921600,
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.uart_offset = 0x200,
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},
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[pbn_moxa8250_8p] = {
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.flags = FL_BASE1,
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.num_ports = 8,
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.base_baud = 921600,
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.uart_offset = 0x200,
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},
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};
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static const struct pci_device_id blacklist[] = {
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@ -3811,20 +3870,6 @@ static const struct pci_device_id blacklist[] = {
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{ PCI_DEVICE(0x4348, 0x5053), }, /* WCH CH353 1S1P */
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{ PCI_DEVICE(0x1c00, 0x3250), }, /* WCH CH382 2S1P */
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/* Moxa Smartio MUE boards handled by 8250_moxa */
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{ PCI_VDEVICE(MOXA, 0x1024), },
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{ PCI_VDEVICE(MOXA, 0x1025), },
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{ PCI_VDEVICE(MOXA, 0x1045), },
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{ PCI_VDEVICE(MOXA, 0x1144), },
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{ PCI_VDEVICE(MOXA, 0x1160), },
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{ PCI_VDEVICE(MOXA, 0x1161), },
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{ PCI_VDEVICE(MOXA, 0x1182), },
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{ PCI_VDEVICE(MOXA, 0x1183), },
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{ PCI_VDEVICE(MOXA, 0x1322), },
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{ PCI_VDEVICE(MOXA, 0x1342), },
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{ PCI_VDEVICE(MOXA, 0x1381), },
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{ PCI_VDEVICE(MOXA, 0x1683), },
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/* Intel platforms with MID UART */
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{ PCI_VDEVICE(INTEL, 0x081b), },
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{ PCI_VDEVICE(INTEL, 0x081c), },
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@ -5407,6 +5452,46 @@ static const struct pci_device_id serial_pci_tbl[] = {
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_ni8431_4 },
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/*
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* MOXA
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*/
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{ PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102E,
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_moxa8250_2p },
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{ PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102EL,
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_moxa8250_2p },
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{ PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104EL_A,
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_moxa8250_4p },
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{ PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP114EL,
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_moxa8250_4p },
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{ PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP116E_A_A,
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_moxa8250_8p },
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{ PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP116E_A_B,
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_moxa8250_8p },
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{ PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP118EL_A,
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_moxa8250_8p },
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{ PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP118E_A_I,
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_moxa8250_8p },
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{ PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132EL,
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_moxa8250_2p },
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{ PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP134EL_A,
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_moxa8250_4p },
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{ PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP138E_A,
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_moxa8250_8p },
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{ PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP168EL_A,
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_moxa8250_8p },
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/*
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* ADDI-DATA GmbH communication cards <info@addi-data.com>
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*/
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@ -468,16 +468,6 @@ config SERIAL_8250_MID
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present on the UART found on Intel Medfield SOC and various other
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Intel platforms.
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config SERIAL_8250_MOXA
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tristate "MOXA SmartIO MUE support"
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depends on SERIAL_8250 && PCI
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help
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Say Y here if you have a Moxa SmartIO MUE multiport serial card.
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If unsure, say N.
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This driver can also be built as a module. The module will be called
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8250_moxa. If you want to do that, say M here.
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config SERIAL_8250_PXA
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tristate "PXA serial port support"
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depends on SERIAL_8250
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@ -35,7 +35,6 @@ obj-$(CONFIG_SERIAL_8250_UNIPHIER) += 8250_uniphier.o
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obj-$(CONFIG_SERIAL_8250_INGENIC) += 8250_ingenic.o
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obj-$(CONFIG_SERIAL_8250_LPSS) += 8250_lpss.o
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obj-$(CONFIG_SERIAL_8250_MID) += 8250_mid.o
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obj-$(CONFIG_SERIAL_8250_MOXA) += 8250_moxa.o
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obj-$(CONFIG_SERIAL_8250_PXA) += 8250_pxa.o
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obj-$(CONFIG_SERIAL_OF_PLATFORM) += 8250_of.o
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