[POWERPC] Remove use of 4level-fixup.h for ppc32
For 32-bit systems, powerpc still relies on the 4level-fixup.h hack, to pretend that the generic pagetable handling stuff is 3-levels rather than 4. This patch removes this, instead using the newer pgtable-nopmd.h to handle the elision of both the pud and pmd pagetable levels (ppc32 pagetables are actually 2 levels). This removes a little extraneous code, and makes it more easily compared to the 64-bit pagetable code. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
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d1953c8888
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@ -306,13 +306,15 @@ EXPORT_SYMBOL(__dma_free_coherent);
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static int __init dma_alloc_init(void)
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{
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pgd_t *pgd;
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pud_t *pud;
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pmd_t *pmd;
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pte_t *pte;
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int ret = 0;
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do {
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pgd = pgd_offset(&init_mm, CONSISTENT_BASE);
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pmd = pmd_alloc(&init_mm, pgd, CONSISTENT_BASE);
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pud = pud_alloc(&init_mm, pgd, CONSISTENT_BASE);
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pmd = pmd_alloc(&init_mm, pud, CONSISTENT_BASE);
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if (!pmd) {
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printk(KERN_ERR "%s: no pmd tables\n", __func__);
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ret = -ENOMEM;
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@ -261,7 +261,7 @@ int map_page(unsigned long va, phys_addr_t pa, int flags)
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int err = -ENOMEM;
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/* Use upper 10 bits of VA to index the first level map */
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pd = pmd_offset(pgd_offset_k(va), va);
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pd = pmd_offset(pud_offset(pgd_offset_k(va), va), va);
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/* Use middle 10 bits of VA to index the second-level map */
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pg = pte_alloc_kernel(pd, va);
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if (pg != 0) {
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@ -354,13 +354,16 @@ int
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get_pteptr(struct mm_struct *mm, unsigned long addr, pte_t **ptep, pmd_t **pmdp)
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{
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pgd_t *pgd;
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pud_t *pud;
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pmd_t *pmd;
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pte_t *pte;
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int retval = 0;
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pgd = pgd_offset(mm, addr & PAGE_MASK);
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if (pgd) {
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pmd = pmd_offset(pgd, addr & PAGE_MASK);
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pud = pud_offset(pgd, addr & PAGE_MASK);
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if (pud && pud_present(*pud)) {
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pmd = pmd_offset(pud, addr & PAGE_MASK);
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if (pmd_present(*pmd)) {
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pte = pte_offset_map(pmd, addr & PAGE_MASK);
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if (pte) {
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@ -372,6 +375,7 @@ get_pteptr(struct mm_struct *mm, unsigned long addr, pte_t **ptep, pmd_t **pmdp)
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}
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}
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}
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}
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return(retval);
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}
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@ -121,16 +121,18 @@ typedef struct { pte_t pte; } real_pte_t;
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#endif
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/* PMD level */
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#ifdef CONFIG_PPC64
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typedef struct { unsigned long pmd; } pmd_t;
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#define pmd_val(x) ((x).pmd)
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#define __pmd(x) ((pmd_t) { (x) })
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/* PUD level exusts only on 4k pages */
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#if defined(CONFIG_PPC64) && !defined(CONFIG_PPC_64K_PAGES)
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#ifndef CONFIG_PPC_64K_PAGES
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typedef struct { unsigned long pud; } pud_t;
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#define pud_val(x) ((x).pud)
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#define __pud(x) ((pud_t) { (x) })
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#endif
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#endif /* !CONFIG_PPC_64K_PAGES */
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#endif /* CONFIG_PPC64 */
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/* PGD level */
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typedef struct { unsigned long pgd; } pgd_t;
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@ -159,15 +161,17 @@ typedef unsigned long real_pte_t;
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#endif
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#ifdef CONFIG_PPC64
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typedef unsigned long pmd_t;
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#define pmd_val(x) (x)
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#define __pmd(x) (x)
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#if defined(CONFIG_PPC64) && !defined(CONFIG_PPC_64K_PAGES)
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#ifndef CONFIG_PPC_64K_PAGES
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typedef unsigned long pud_t;
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#define pud_val(x) (x)
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#define __pud(x) (x)
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#endif
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#endif /* !CONFIG_PPC_64K_PAGES */
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#endif /* CONFIG_PPC64 */
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typedef unsigned long pgd_t;
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#define pgd_val(x) (x)
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@ -12,10 +12,10 @@ extern void pgd_free(pgd_t *pgd);
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* We don't have any real pmd's, and this code never triggers because
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* the pgd will always be present..
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*/
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#define pmd_alloc_one(mm,address) ({ BUG(); ((pmd_t *)2); })
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/* #define pmd_alloc_one(mm,address) ({ BUG(); ((pmd_t *)2); }) */
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#define pmd_free(x) do { } while (0)
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#define __pmd_free_tlb(tlb,x) do { } while (0)
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#define pgd_populate(mm, pmd, pte) BUG()
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/* #define pgd_populate(mm, pmd, pte) BUG() */
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#ifndef CONFIG_BOOKE
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#define pmd_populate_kernel(mm, pmd, pte) \
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@ -1,7 +1,7 @@
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#ifndef _ASM_POWERPC_PGTABLE_PPC32_H
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#define _ASM_POWERPC_PGTABLE_PPC32_H
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#include <asm-generic/4level-fixup.h>
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#include <asm-generic/pgtable-nopmd.h>
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#ifndef __ASSEMBLY__
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#include <linux/sched.h>
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@ -76,13 +76,8 @@ extern unsigned long ioremap_bot, ioremap_base;
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* level has 2048 entries and the second level has 512 64-bit PTE entries.
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* -Matt
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*/
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/* PMD_SHIFT determines the size of the area mapped by the PTE pages */
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#define PMD_SHIFT (PAGE_SHIFT + PTE_SHIFT)
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#define PMD_SIZE (1UL << PMD_SHIFT)
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#define PMD_MASK (~(PMD_SIZE-1))
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/* PGDIR_SHIFT determines what a top-level page table entry can map */
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#define PGDIR_SHIFT PMD_SHIFT
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#define PGDIR_SHIFT (PAGE_SHIFT + PTE_SHIFT)
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#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
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#define PGDIR_MASK (~(PGDIR_SIZE-1))
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@ -103,8 +98,6 @@ extern unsigned long ioremap_bot, ioremap_base;
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#define pte_ERROR(e) \
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printk("%s:%d: bad pte %llx.\n", __FILE__, __LINE__, \
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(unsigned long long)pte_val(e))
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#define pmd_ERROR(e) \
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printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
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#define pgd_ERROR(e) \
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printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
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@ -515,19 +508,6 @@ extern unsigned long empty_zero_page[1024];
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#define pmd_clear(pmdp) do { pmd_val(*(pmdp)) = 0; } while (0)
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#ifndef __ASSEMBLY__
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/*
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* The "pgd_xxx()" functions here are trivial for a folded two-level
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* setup: the pgd is never bad, and a pmd always exists (as it's folded
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* into the pgd entry)
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*/
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static inline int pgd_none(pgd_t pgd) { return 0; }
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static inline int pgd_bad(pgd_t pgd) { return 0; }
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static inline int pgd_present(pgd_t pgd) { return 1; }
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#define pgd_clear(xp) do { } while (0)
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#define pgd_page_vaddr(pgd) \
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((unsigned long) __va(pgd_val(pgd) & PAGE_MASK))
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/*
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* The following only work if pte_present() is true.
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* Undefined behaviour if not..
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@ -737,12 +717,6 @@ extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
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#define pgd_index(address) ((address) >> PGDIR_SHIFT)
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#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
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/* Find an entry in the second-level page table.. */
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static inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
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{
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return (pmd_t *) dir;
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}
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/* Find an entry in the third-level page table.. */
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#define pte_index(address) \
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(((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
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