i5100_edac: convert driver to use the new edac ABI
The legacy edac ABI is going to be removed. Port the driver to use and benefit from the new API functionality. Cc: "Niklas Söderlund" <niklas.soderlund@ericsson.com> Cc: Borislav Petkov <borislav.petkov@amd.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Mauro Carvalho Chehab
Родитель
702df64053
Коммит
d1afaa0a6e
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@ -14,6 +14,11 @@
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* rows for each respective channel are laid out one after another,
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* the first half belonging to channel 0, the second half belonging
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* to channel 1.
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*
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* This driver is for DDR2 DIMMs, and it uses chip select to select among the
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* several ranks. However, instead of showing memories as ranks, it outputs
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* them as DIMM's. An internal table creates the association between ranks
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* and DIMM's.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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@ -410,14 +415,6 @@ static int i5100_csrow_to_chan(const struct mem_ctl_info *mci, int csrow)
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return csrow / priv->ranksperchan;
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}
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static unsigned i5100_rank_to_csrow(const struct mem_ctl_info *mci,
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int chan, int rank)
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{
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const struct i5100_priv *priv = mci->pvt_info;
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return chan * priv->ranksperchan + rank;
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}
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static void i5100_handle_ce(struct mem_ctl_info *mci,
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int chan,
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unsigned bank,
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@ -427,21 +424,17 @@ static void i5100_handle_ce(struct mem_ctl_info *mci,
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unsigned ras,
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const char *msg)
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{
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const int csrow = i5100_rank_to_csrow(mci, chan, rank);
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char *label = NULL;
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char detail[80];
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if (mci->csrows[csrow].channels[0].dimm)
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label = mci->csrows[csrow].channels[0].dimm->label;
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/* Form out message */
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snprintf(detail, sizeof(detail),
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"bank %u, cas %u, ras %u\n",
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bank, cas, ras);
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printk(KERN_ERR
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"CE chan %d, bank %u, rank %u, syndrome 0x%lx, "
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"cas %u, ras %u, csrow %u, label \"%s\": %s\n",
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chan, bank, rank, syndrome, cas, ras,
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csrow, label, msg);
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mci->ce_count++;
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mci->csrows[csrow].ce_count++;
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mci->csrows[csrow].channels[0].ce_count++;
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edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
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0, 0, syndrome,
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chan, rank, -1,
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msg, detail, NULL);
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}
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static void i5100_handle_ue(struct mem_ctl_info *mci,
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@ -453,20 +446,17 @@ static void i5100_handle_ue(struct mem_ctl_info *mci,
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unsigned ras,
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const char *msg)
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{
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const int csrow = i5100_rank_to_csrow(mci, chan, rank);
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char *label = NULL;
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char detail[80];
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if (mci->csrows[csrow].channels[0].dimm)
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label = mci->csrows[csrow].channels[0].dimm->label;
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/* Form out message */
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snprintf(detail, sizeof(detail),
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"bank %u, cas %u, ras %u\n",
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bank, cas, ras);
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printk(KERN_ERR
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"UE chan %d, bank %u, rank %u, syndrome 0x%lx, "
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"cas %u, ras %u, csrow %u, label \"%s\": %s\n",
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chan, bank, rank, syndrome, cas, ras,
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csrow, label, msg);
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mci->ue_count++;
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mci->csrows[csrow].ue_count++;
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edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
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0, 0, syndrome,
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chan, rank, -1,
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msg, detail, NULL);
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}
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static void i5100_read_log(struct mem_ctl_info *mci, int chan,
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@ -843,11 +833,10 @@ static void __devinit i5100_init_interleaving(struct pci_dev *pdev,
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static void __devinit i5100_init_csrows(struct mem_ctl_info *mci)
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{
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int i;
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unsigned long total_pages = 0UL;
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struct i5100_priv *priv = mci->pvt_info;
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struct dimm_info *dimm;
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for (i = 0; i < mci->nr_csrows; i++) {
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for (i = 0; i < mci->tot_dimms; i++) {
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struct dimm_info *dimm;
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const unsigned long npages = i5100_npages(mci, i);
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const unsigned chan = i5100_csrow_to_chan(mci, i);
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const unsigned rank = i5100_csrow_to_rank(mci, i);
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@ -855,30 +844,23 @@ static void __devinit i5100_init_csrows(struct mem_ctl_info *mci)
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if (!npages)
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continue;
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/*
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* FIXME: these two are totally bogus -- I don't see how to
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* map them correctly to this structure...
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*/
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mci->csrows[i].csrow_idx = i;
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mci->csrows[i].mci = mci;
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mci->csrows[i].nr_channels = 1;
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mci->csrows[i].channels[0].csrow = mci->csrows + i;
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total_pages += npages;
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dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms, mci->n_layers,
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chan, rank, 0);
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dimm = mci->csrows[i].channels[0].dimm;
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dimm->nr_pages = npages;
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if (npages) {
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total_pages += npages;
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dimm->grain = 32;
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dimm->dtype = (priv->mtr[chan][rank].width == 4) ?
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DEV_X4 : DEV_X8;
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DEV_X4 : DEV_X8;
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dimm->mtype = MEM_RDDR2;
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dimm->edac_mode = EDAC_SECDED;
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snprintf(dimm->label, sizeof(dimm->label),
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"DIMM%u",
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i5100_rank_to_slot(mci, chan, rank));
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}
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debugf2("dimm channel %d, rank %d, size %zd\n",
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chan, rank, PAGES_TO_MiB(npages));
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}
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}
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@ -887,6 +869,7 @@ static int __devinit i5100_init_one(struct pci_dev *pdev,
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{
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int rc;
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struct mem_ctl_info *mci;
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struct edac_mc_layer layers[2];
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struct i5100_priv *priv;
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struct pci_dev *ch0mm, *ch1mm;
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int ret = 0;
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@ -947,7 +930,14 @@ static int __devinit i5100_init_one(struct pci_dev *pdev,
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goto bail_ch1;
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}
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mci = edac_mc_alloc(sizeof(*priv), ranksperch * 2, 1, 0);
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layers[0].type = EDAC_MC_LAYER_CHANNEL;
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layers[0].size = 2;
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layers[0].is_virt_csrow = false;
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layers[1].type = EDAC_MC_LAYER_SLOT;
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layers[1].size = ranksperch;
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layers[1].is_virt_csrow = true;
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mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers,
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sizeof(*priv));
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if (!mci) {
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ret = -ENOMEM;
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goto bail_disable_ch1;
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