mxser: store FCR state in mxser_port::FCR
We force the FCR contents on many places in the code instead of writing what was actually set in mxser_change_speed() (by ->activate() or ->set_serial_info()). So introduce mxser_port::FCR to hold the proper contents and bitwise-OR the value to what needs to be set on all those locations. That is, clearing RX and/or TX FIFOs. Those flags are self-clearing, so no need to set them to mxser_port::FCR. Signed-off-by: Jiri Slaby <jslaby@suse.cz> Link: https://lore.kernel.org/r/20210922075938.31390-7-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Родитель
215fa41c2d
Коммит
d249e662c3
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@ -249,6 +249,7 @@ struct mxser_port {
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unsigned char x_char; /* xon/xoff character */
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u8 IER; /* Interrupt Enable Register */
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u8 MCR; /* Modem control register */
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u8 FCR; /* FIFO control register */
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bool ldisc_stop_rx;
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@ -562,7 +563,7 @@ static void mxser_handle_cts(struct tty_struct *tty, struct mxser_port *info,
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static void mxser_change_speed(struct tty_struct *tty, struct ktermios *old_termios)
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{
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struct mxser_port *info = tty->driver_data;
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unsigned cflag, cval, fcr;
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unsigned cflag, cval;
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cflag = tty->termios.c_cflag;
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@ -600,25 +601,25 @@ static void mxser_change_speed(struct tty_struct *tty, struct ktermios *old_term
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if (cflag & CMSPAR)
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cval |= UART_LCR_SPAR;
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fcr = 0;
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info->FCR = 0;
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if (info->board->must_hwid) {
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fcr |= UART_FCR_ENABLE_FIFO |
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info->FCR |= UART_FCR_ENABLE_FIFO |
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MOXA_MUST_FCR_GDA_MODE_ENABLE;
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mxser_set_must_fifo_value(info);
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} else if (info->type != PORT_8250 && info->type != PORT_16450) {
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fcr |= UART_FCR_ENABLE_FIFO;
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info->FCR |= UART_FCR_ENABLE_FIFO;
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switch (info->rx_high_water) {
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case 1:
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fcr |= UART_FCR_TRIGGER_1;
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info->FCR |= UART_FCR_TRIGGER_1;
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break;
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case 4:
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fcr |= UART_FCR_TRIGGER_4;
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info->FCR |= UART_FCR_TRIGGER_4;
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break;
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case 8:
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fcr |= UART_FCR_TRIGGER_8;
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info->FCR |= UART_FCR_TRIGGER_8;
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break;
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default:
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fcr |= UART_FCR_TRIGGER_14;
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info->FCR |= UART_FCR_TRIGGER_14;
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break;
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}
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}
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@ -679,7 +680,7 @@ static void mxser_change_speed(struct tty_struct *tty, struct ktermios *old_term
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}
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outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
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outb(info->FCR, info->ioaddr + UART_FCR);
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outb(cval, info->ioaddr + UART_LCR);
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}
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@ -865,7 +866,7 @@ static void mxser_flush_buffer(struct tty_struct *tty)
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spin_lock_irqsave(&info->slock, flags);
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info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
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outb(UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
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outb(info->FCR | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
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info->ioaddr + UART_FCR);
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spin_unlock_irqrestore(&info->slock, flags);
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@ -1572,8 +1573,7 @@ static u8 mxser_receive_chars_old(struct tty_struct *tty,
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ch = inb(port->ioaddr + UART_RX);
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if (hwid && (status & UART_LSR_OE))
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outb(UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
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MOXA_MUST_FCR_GDA_MODE_ENABLE,
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outb(port->FCR | UART_FCR_CLEAR_RCVR,
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port->ioaddr + UART_FCR);
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status &= port->read_status_mask;
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if (status & port->ignore_status_mask) {
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@ -1685,8 +1685,7 @@ static bool mxser_port_isr(struct mxser_port *port)
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tty = tty_port_tty_get(&port->port);
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if (!tty || port->closing || !tty_port_initialized(&port->port)) {
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status = inb(port->ioaddr + UART_LSR);
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outb(MOXA_MUST_FCR_GDA_MODE_ENABLE | UART_FCR_ENABLE_FIFO |
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UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
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outb(port->FCR | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
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port->ioaddr + UART_FCR);
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inb(port->ioaddr + UART_MSR);
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