pwm: mtk-disp: Disable shadow registers before setting backlight values
[ Upstream commit36dd7f530a
] If shadow registers usage is not desired, disable that before performing any write to CON0/1 registers in the .apply() callback, otherwise we may lose clkdiv or period/width updates. Fixes:cd4b45ac44
("pwm: Add MediaTek MT2701 display PWM driver support") Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> Tested-by: Alexandre Mergnat <amergnat@baylibre.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -138,6 +138,19 @@ static int mtk_disp_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
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high_width = mul_u64_u64_div_u64(state->duty_cycle, rate, div);
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value = period | (high_width << PWM_HIGH_WIDTH_SHIFT);
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if (mdp->data->bls_debug && !mdp->data->has_commit) {
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/*
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* For MT2701, disable double buffer before writing register
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* and select manual mode and use PWM_PERIOD/PWM_HIGH_WIDTH.
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*/
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mtk_disp_pwm_update_bits(mdp, mdp->data->bls_debug,
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mdp->data->bls_debug_mask,
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mdp->data->bls_debug_mask);
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mtk_disp_pwm_update_bits(mdp, mdp->data->con0,
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mdp->data->con0_sel,
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mdp->data->con0_sel);
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}
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mtk_disp_pwm_update_bits(mdp, mdp->data->con0,
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PWM_CLKDIV_MASK,
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clk_div << PWM_CLKDIV_SHIFT);
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@ -152,17 +165,6 @@ static int mtk_disp_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
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mtk_disp_pwm_update_bits(mdp, mdp->data->commit,
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mdp->data->commit_mask,
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0x0);
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} else {
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/*
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* For MT2701, disable double buffer before writing register
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* and select manual mode and use PWM_PERIOD/PWM_HIGH_WIDTH.
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*/
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mtk_disp_pwm_update_bits(mdp, mdp->data->bls_debug,
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mdp->data->bls_debug_mask,
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mdp->data->bls_debug_mask);
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mtk_disp_pwm_update_bits(mdp, mdp->data->con0,
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mdp->data->con0_sel,
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mdp->data->con0_sel);
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}
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mtk_disp_pwm_update_bits(mdp, DISP_PWM_EN, mdp->data->enable_mask,
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