dpaa2-ptp: reuse ptp_qoriq driver
Although dpaa2-ptp.c driver is a fsl_mc_driver which is using MC APIs for register accessing, it's same IP block with eTSEC/DPAA/ENETC 1588 timer. This patch is to convert to reuse ptp_qoriq driver by using register ioremap and dropping related MC APIs. However the interrupts could only be handled by MC which fires MSIs to ARM cores. So the interrupt enabling and handling still rely on MC APIs. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Yangbo Lu
David S. Miller
Родитель
8099d7ca6e
Коммит
d346c9e86d
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@ -10,8 +10,7 @@ config FSL_DPAA2_ETH
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config FSL_DPAA2_PTP_CLOCK
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tristate "Freescale DPAA2 PTP Clock"
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depends on FSL_DPAA2_ETH
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imply PTP_1588_CLOCK
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depends on FSL_DPAA2_ETH && PTP_1588_CLOCK_QORIQ
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default y
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help
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This driver adds support for using the DPAA2 1588 timer module
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@ -5,114 +5,14 @@
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*/
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/ptp_clock_kernel.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/fsl/mc.h>
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#include <linux/fsl/ptp_qoriq.h>
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#include "dpaa2-ptp.h"
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struct ptp_dpaa2_priv {
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struct fsl_mc_device *ptp_mc_dev;
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struct ptp_clock *clock;
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struct ptp_clock_info caps;
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u32 freq_comp;
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};
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/* PTP clock operations */
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static int ptp_dpaa2_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
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{
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struct ptp_dpaa2_priv *ptp_dpaa2 =
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container_of(ptp, struct ptp_dpaa2_priv, caps);
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struct fsl_mc_device *mc_dev = ptp_dpaa2->ptp_mc_dev;
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struct device *dev = &mc_dev->dev;
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u64 adj;
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u32 diff, tmr_add;
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int neg_adj = 0;
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int err = 0;
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if (ppb < 0) {
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neg_adj = 1;
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ppb = -ppb;
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}
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tmr_add = ptp_dpaa2->freq_comp;
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adj = tmr_add;
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adj *= ppb;
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diff = div_u64(adj, 1000000000ULL);
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tmr_add = neg_adj ? tmr_add - diff : tmr_add + diff;
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err = dprtc_set_freq_compensation(mc_dev->mc_io, 0,
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mc_dev->mc_handle, tmr_add);
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if (err)
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dev_err(dev, "dprtc_set_freq_compensation err %d\n", err);
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return err;
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}
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static int ptp_dpaa2_adjtime(struct ptp_clock_info *ptp, s64 delta)
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{
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struct ptp_dpaa2_priv *ptp_dpaa2 =
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container_of(ptp, struct ptp_dpaa2_priv, caps);
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struct fsl_mc_device *mc_dev = ptp_dpaa2->ptp_mc_dev;
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struct device *dev = &mc_dev->dev;
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s64 now;
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int err = 0;
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err = dprtc_get_time(mc_dev->mc_io, 0, mc_dev->mc_handle, &now);
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if (err) {
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dev_err(dev, "dprtc_get_time err %d\n", err);
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return err;
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}
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now += delta;
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err = dprtc_set_time(mc_dev->mc_io, 0, mc_dev->mc_handle, now);
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if (err)
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dev_err(dev, "dprtc_set_time err %d\n", err);
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return err;
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}
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static int ptp_dpaa2_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
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{
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struct ptp_dpaa2_priv *ptp_dpaa2 =
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container_of(ptp, struct ptp_dpaa2_priv, caps);
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struct fsl_mc_device *mc_dev = ptp_dpaa2->ptp_mc_dev;
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struct device *dev = &mc_dev->dev;
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u64 ns;
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u32 remainder;
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int err = 0;
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err = dprtc_get_time(mc_dev->mc_io, 0, mc_dev->mc_handle, &ns);
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if (err) {
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dev_err(dev, "dprtc_get_time err %d\n", err);
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return err;
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}
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ts->tv_sec = div_u64_rem(ns, 1000000000, &remainder);
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ts->tv_nsec = remainder;
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return err;
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}
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static int ptp_dpaa2_settime(struct ptp_clock_info *ptp,
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const struct timespec64 *ts)
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{
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struct ptp_dpaa2_priv *ptp_dpaa2 =
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container_of(ptp, struct ptp_dpaa2_priv, caps);
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struct fsl_mc_device *mc_dev = ptp_dpaa2->ptp_mc_dev;
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struct device *dev = &mc_dev->dev;
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u64 ns;
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int err = 0;
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ns = ts->tv_sec * 1000000000ULL;
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ns += ts->tv_nsec;
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err = dprtc_set_time(mc_dev->mc_io, 0, mc_dev->mc_handle, ns);
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if (err)
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dev_err(dev, "dprtc_set_time err %d\n", err);
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return err;
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}
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static const struct ptp_clock_info ptp_dpaa2_caps = {
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static const struct ptp_clock_info dpaa2_ptp_caps = {
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.owner = THIS_MODULE,
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.name = "DPAA2 PTP Clock",
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.max_adj = 512000,
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@ -121,21 +21,22 @@ static const struct ptp_clock_info ptp_dpaa2_caps = {
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.n_per_out = 3,
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.n_pins = 0,
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.pps = 1,
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.adjfreq = ptp_dpaa2_adjfreq,
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.adjtime = ptp_dpaa2_adjtime,
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.gettime64 = ptp_dpaa2_gettime,
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.settime64 = ptp_dpaa2_settime,
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.adjfine = ptp_qoriq_adjfine,
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.adjtime = ptp_qoriq_adjtime,
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.gettime64 = ptp_qoriq_gettime,
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.settime64 = ptp_qoriq_settime,
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};
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static int dpaa2_ptp_probe(struct fsl_mc_device *mc_dev)
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{
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struct device *dev = &mc_dev->dev;
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struct ptp_dpaa2_priv *ptp_dpaa2;
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u32 tmr_add = 0;
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struct ptp_qoriq *ptp_qoriq;
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struct device_node *node;
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void __iomem *base;
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int err;
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ptp_dpaa2 = devm_kzalloc(dev, sizeof(*ptp_dpaa2), GFP_KERNEL);
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if (!ptp_dpaa2)
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ptp_qoriq = devm_kzalloc(dev, sizeof(*ptp_qoriq), GFP_KERNEL);
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if (!ptp_qoriq)
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return -ENOMEM;
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err = fsl_mc_portal_allocate(mc_dev, 0, &mc_dev->mc_io);
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@ -154,30 +55,33 @@ static int dpaa2_ptp_probe(struct fsl_mc_device *mc_dev)
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goto err_free_mcp;
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}
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ptp_dpaa2->ptp_mc_dev = mc_dev;
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ptp_qoriq->dev = dev;
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err = dprtc_get_freq_compensation(mc_dev->mc_io, 0,
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mc_dev->mc_handle, &tmr_add);
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if (err) {
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dev_err(dev, "dprtc_get_freq_compensation err %d\n", err);
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node = of_find_compatible_node(NULL, NULL, "fsl,dpaa2-ptp");
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if (!node) {
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err = -ENODEV;
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goto err_close;
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}
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ptp_dpaa2->freq_comp = tmr_add;
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ptp_dpaa2->caps = ptp_dpaa2_caps;
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dev->of_node = node;
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ptp_dpaa2->clock = ptp_clock_register(&ptp_dpaa2->caps, dev);
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if (IS_ERR(ptp_dpaa2->clock)) {
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err = PTR_ERR(ptp_dpaa2->clock);
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base = of_iomap(node, 0);
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if (!base) {
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err = -ENOMEM;
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goto err_close;
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}
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dpaa2_phc_index = ptp_clock_index(ptp_dpaa2->clock);
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err = ptp_qoriq_init(ptp_qoriq, base, &dpaa2_ptp_caps);
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if (err)
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goto err_unmap;
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dev_set_drvdata(dev, ptp_dpaa2);
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dpaa2_phc_index = ptp_qoriq->phc_index;
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dev_set_drvdata(dev, ptp_qoriq);
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return 0;
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err_unmap:
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iounmap(base);
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err_close:
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dprtc_close(mc_dev->mc_io, 0, mc_dev->mc_handle);
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err_free_mcp:
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@ -188,11 +92,13 @@ err_exit:
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static int dpaa2_ptp_remove(struct fsl_mc_device *mc_dev)
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{
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struct ptp_dpaa2_priv *ptp_dpaa2;
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struct device *dev = &mc_dev->dev;
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struct ptp_qoriq *ptp_qoriq;
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ptp_dpaa2 = dev_get_drvdata(dev);
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ptp_clock_unregister(ptp_dpaa2->clock);
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ptp_qoriq = dev_get_drvdata(dev);
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dpaa2_phc_index = -1;
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ptp_qoriq_free(ptp_qoriq);
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dprtc_close(mc_dev->mc_io, 0, mc_dev->mc_handle);
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fsl_mc_portal_free(mc_dev->mc_io);
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@ -17,24 +17,11 @@
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#define DPRTC_CMDID_CLOSE DPRTC_CMD(0x800)
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#define DPRTC_CMDID_OPEN DPRTC_CMD(0x810)
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#define DPRTC_CMDID_SET_FREQ_COMPENSATION DPRTC_CMD(0x1d1)
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#define DPRTC_CMDID_GET_FREQ_COMPENSATION DPRTC_CMD(0x1d2)
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#define DPRTC_CMDID_GET_TIME DPRTC_CMD(0x1d3)
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#define DPRTC_CMDID_SET_TIME DPRTC_CMD(0x1d4)
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#pragma pack(push, 1)
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struct dprtc_cmd_open {
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__le32 dprtc_id;
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};
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struct dprtc_get_freq_compensation {
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__le32 freq_compensation;
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};
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struct dprtc_time {
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__le64 time;
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};
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#pragma pack(pop)
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#endif /* _FSL_DPRTC_CMD_H */
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@ -72,123 +72,3 @@ int dprtc_close(struct fsl_mc_io *mc_io,
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return mc_send_command(mc_io, &cmd);
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}
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/**
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* dprtc_set_freq_compensation() - Sets a new frequency compensation value.
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*
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* @mc_io: Pointer to MC portal's I/O object
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* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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* @token: Token of DPRTC object
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* @freq_compensation: The new frequency compensation value to set.
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*
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* Return: '0' on Success; Error code otherwise.
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*/
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int dprtc_set_freq_compensation(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 token,
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u32 freq_compensation)
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{
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struct dprtc_get_freq_compensation *cmd_params;
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struct fsl_mc_command cmd = { 0 };
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cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_FREQ_COMPENSATION,
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cmd_flags,
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token);
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cmd_params = (struct dprtc_get_freq_compensation *)cmd.params;
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cmd_params->freq_compensation = cpu_to_le32(freq_compensation);
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return mc_send_command(mc_io, &cmd);
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}
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/**
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* dprtc_get_freq_compensation() - Retrieves the frequency compensation value
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*
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* @mc_io: Pointer to MC portal's I/O object
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* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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* @token: Token of DPRTC object
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* @freq_compensation: Frequency compensation value
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*
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* Return: '0' on Success; Error code otherwise.
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*/
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int dprtc_get_freq_compensation(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 token,
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u32 *freq_compensation)
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{
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struct dprtc_get_freq_compensation *rsp_params;
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struct fsl_mc_command cmd = { 0 };
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int err;
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cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_FREQ_COMPENSATION,
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cmd_flags,
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token);
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err = mc_send_command(mc_io, &cmd);
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if (err)
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return err;
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rsp_params = (struct dprtc_get_freq_compensation *)cmd.params;
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*freq_compensation = le32_to_cpu(rsp_params->freq_compensation);
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return 0;
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}
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/**
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* dprtc_get_time() - Returns the current RTC time.
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*
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* @mc_io: Pointer to MC portal's I/O object
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* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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* @token: Token of DPRTC object
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* @time: Current RTC time.
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*
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* Return: '0' on Success; Error code otherwise.
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*/
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int dprtc_get_time(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 token,
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uint64_t *time)
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{
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struct dprtc_time *rsp_params;
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struct fsl_mc_command cmd = { 0 };
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int err;
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cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_TIME,
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cmd_flags,
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token);
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err = mc_send_command(mc_io, &cmd);
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if (err)
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return err;
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rsp_params = (struct dprtc_time *)cmd.params;
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*time = le64_to_cpu(rsp_params->time);
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return 0;
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}
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/**
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* dprtc_set_time() - Updates current RTC time.
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*
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* @mc_io: Pointer to MC portal's I/O object
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* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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* @token: Token of DPRTC object
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* @time: New RTC time.
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*
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* Return: '0' on Success; Error code otherwise.
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*/
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int dprtc_set_time(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 token,
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uint64_t time)
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{
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struct dprtc_time *cmd_params;
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struct fsl_mc_command cmd = { 0 };
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cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_TIME,
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cmd_flags,
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token);
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cmd_params = (struct dprtc_time *)cmd.params;
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cmd_params->time = cpu_to_le64(time);
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return mc_send_command(mc_io, &cmd);
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}
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@ -22,24 +22,4 @@ int dprtc_close(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 token);
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int dprtc_set_freq_compensation(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 token,
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u32 freq_compensation);
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int dprtc_get_freq_compensation(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 token,
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u32 *freq_compensation);
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int dprtc_get_time(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 token,
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uint64_t *time);
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int dprtc_set_time(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 token,
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uint64_t time);
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#endif /* __FSL_DPRTC_H */
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