KVM: emulate: protect checks on ctxt->d by a common "if (unlikely())"
There are several checks for "peculiar" aspects of instructions in both x86_decode_insn and x86_emulate_insn. Group them together, and guard them with a single "if" that lets the processor quickly skip them all. Make this more effective by adding two more flag bits that say whether the .intercept and .check_perm fields are valid. We will reuse these flags later to avoid initializing fields of the emulate_ctxt struct. This skims about 30 cycles for each emulated instructions, which is approximately a 3% improvement. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini
Родитель
e24186e097
Коммит
d40a6898e5
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@ -162,6 +162,8 @@
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#define NoWrite ((u64)1 << 45) /* No writeback */
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#define SrcWrite ((u64)1 << 46) /* Write back src operand */
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#define NoMod ((u64)1 << 47) /* Mod field is ignored */
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#define Intercept ((u64)1 << 48) /* Has valid intercept field */
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#define CheckPerm ((u64)1 << 49) /* Has valid check_perm field */
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#define DstXacc (DstAccLo | SrcAccHi | SrcWrite)
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@ -3546,9 +3548,9 @@ static int check_perm_out(struct x86_emulate_ctxt *ctxt)
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}
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#define D(_y) { .flags = (_y) }
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#define DI(_y, _i) { .flags = (_y), .intercept = x86_intercept_##_i }
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#define DIP(_y, _i, _p) { .flags = (_y), .intercept = x86_intercept_##_i, \
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.check_perm = (_p) }
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#define DI(_y, _i) { .flags = (_y)|Intercept, .intercept = x86_intercept_##_i }
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#define DIP(_y, _i, _p) { .flags = (_y)|Intercept|CheckPerm, \
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.intercept = x86_intercept_##_i, .check_perm = (_p) }
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#define N D(NotImpl)
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#define EXT(_f, _e) { .flags = ((_f) | RMExt), .u.group = (_e) }
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#define G(_f, _g) { .flags = ((_f) | Group | ModRM), .u.group = (_g) }
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@ -3557,10 +3559,10 @@ static int check_perm_out(struct x86_emulate_ctxt *ctxt)
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#define I(_f, _e) { .flags = (_f), .u.execute = (_e) }
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#define F(_f, _e) { .flags = (_f) | Fastop, .u.fastop = (_e) }
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#define II(_f, _e, _i) \
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{ .flags = (_f), .u.execute = (_e), .intercept = x86_intercept_##_i }
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{ .flags = (_f)|Intercept, .u.execute = (_e), .intercept = x86_intercept_##_i }
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#define IIP(_f, _e, _i, _p) \
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{ .flags = (_f), .u.execute = (_e), .intercept = x86_intercept_##_i, \
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.check_perm = (_p) }
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{ .flags = (_f)|Intercept|CheckPerm, .u.execute = (_e), \
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.intercept = x86_intercept_##_i, .check_perm = (_p) }
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#define GP(_f, _g) { .flags = ((_f) | Prefix), .u.gprefix = (_g) }
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#define D2bv(_f) D((_f) | ByteOp), D(_f)
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@ -4393,29 +4395,37 @@ done_prefixes:
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return EMULATION_FAILED;
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ctxt->execute = opcode.u.execute;
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ctxt->check_perm = opcode.check_perm;
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ctxt->intercept = opcode.intercept;
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if (ctxt->d & NotImpl)
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return EMULATION_FAILED;
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if (unlikely(ctxt->d &
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(NotImpl|EmulateOnUD|Stack|Op3264|Sse|Mmx|Intercept|CheckPerm))) {
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/*
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* These are copied unconditionally here, and checked unconditionally
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* in x86_emulate_insn.
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*/
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ctxt->check_perm = opcode.check_perm;
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ctxt->intercept = opcode.intercept;
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if (!(ctxt->d & EmulateOnUD) && ctxt->ud)
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return EMULATION_FAILED;
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if (ctxt->d & NotImpl)
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return EMULATION_FAILED;
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if (mode == X86EMUL_MODE_PROT64 && (ctxt->d & Stack))
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ctxt->op_bytes = 8;
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if (!(ctxt->d & EmulateOnUD) && ctxt->ud)
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return EMULATION_FAILED;
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if (ctxt->d & Op3264) {
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if (mode == X86EMUL_MODE_PROT64)
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if (mode == X86EMUL_MODE_PROT64 && (ctxt->d & Stack))
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ctxt->op_bytes = 8;
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else
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ctxt->op_bytes = 4;
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}
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if (ctxt->d & Sse)
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ctxt->op_bytes = 16;
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else if (ctxt->d & Mmx)
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ctxt->op_bytes = 8;
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if (ctxt->d & Op3264) {
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if (mode == X86EMUL_MODE_PROT64)
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ctxt->op_bytes = 8;
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else
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ctxt->op_bytes = 4;
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}
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if (ctxt->d & Sse)
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ctxt->op_bytes = 16;
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else if (ctxt->d & Mmx)
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ctxt->op_bytes = 8;
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}
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/* ModRM and SIB bytes. */
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if (ctxt->d & ModRM) {
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@ -4549,76 +4559,79 @@ int x86_emulate_insn(struct x86_emulate_ctxt *ctxt)
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goto done;
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}
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if ((ctxt->mode == X86EMUL_MODE_PROT64 && (ctxt->d & No64)) ||
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(ctxt->d & Undefined)) {
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rc = emulate_ud(ctxt);
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goto done;
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}
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if (((ctxt->d & (Sse|Mmx)) && ((ops->get_cr(ctxt, 0) & X86_CR0_EM)))
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|| ((ctxt->d & Sse) && !(ops->get_cr(ctxt, 4) & X86_CR4_OSFXSR))) {
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rc = emulate_ud(ctxt);
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goto done;
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}
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if ((ctxt->d & (Sse|Mmx)) && (ops->get_cr(ctxt, 0) & X86_CR0_TS)) {
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rc = emulate_nm(ctxt);
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goto done;
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}
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if (ctxt->d & Mmx) {
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rc = flush_pending_x87_faults(ctxt);
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if (rc != X86EMUL_CONTINUE)
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if (unlikely(ctxt->d &
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(No64|Undefined|Sse|Mmx|Intercept|CheckPerm|Priv|Prot|String))) {
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if ((ctxt->mode == X86EMUL_MODE_PROT64 && (ctxt->d & No64)) ||
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(ctxt->d & Undefined)) {
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rc = emulate_ud(ctxt);
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goto done;
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/*
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* Now that we know the fpu is exception safe, we can fetch
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* operands from it.
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*/
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fetch_possible_mmx_operand(ctxt, &ctxt->src);
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fetch_possible_mmx_operand(ctxt, &ctxt->src2);
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if (!(ctxt->d & Mov))
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fetch_possible_mmx_operand(ctxt, &ctxt->dst);
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}
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}
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if (unlikely(ctxt->guest_mode) && ctxt->intercept) {
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rc = emulator_check_intercept(ctxt, ctxt->intercept,
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X86_ICPT_PRE_EXCEPT);
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if (rc != X86EMUL_CONTINUE)
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if (((ctxt->d & (Sse|Mmx)) && ((ops->get_cr(ctxt, 0) & X86_CR0_EM)))
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|| ((ctxt->d & Sse) && !(ops->get_cr(ctxt, 4) & X86_CR4_OSFXSR))) {
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rc = emulate_ud(ctxt);
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goto done;
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}
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}
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/* Privileged instruction can be executed only in CPL=0 */
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if ((ctxt->d & Priv) && ops->cpl(ctxt)) {
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rc = emulate_gp(ctxt, 0);
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goto done;
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}
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/* Instruction can only be executed in protected mode */
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if ((ctxt->d & Prot) && ctxt->mode < X86EMUL_MODE_PROT16) {
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rc = emulate_ud(ctxt);
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goto done;
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}
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/* Do instruction specific permission checks */
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if (ctxt->check_perm) {
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rc = ctxt->check_perm(ctxt);
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if (rc != X86EMUL_CONTINUE)
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if ((ctxt->d & (Sse|Mmx)) && (ops->get_cr(ctxt, 0) & X86_CR0_TS)) {
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rc = emulate_nm(ctxt);
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goto done;
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}
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}
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if (unlikely(ctxt->guest_mode) && ctxt->intercept) {
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rc = emulator_check_intercept(ctxt, ctxt->intercept,
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X86_ICPT_POST_EXCEPT);
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if (rc != X86EMUL_CONTINUE)
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goto done;
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}
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if (ctxt->d & Mmx) {
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rc = flush_pending_x87_faults(ctxt);
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if (rc != X86EMUL_CONTINUE)
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goto done;
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/*
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* Now that we know the fpu is exception safe, we can fetch
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* operands from it.
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*/
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fetch_possible_mmx_operand(ctxt, &ctxt->src);
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fetch_possible_mmx_operand(ctxt, &ctxt->src2);
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if (!(ctxt->d & Mov))
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fetch_possible_mmx_operand(ctxt, &ctxt->dst);
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}
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if (ctxt->rep_prefix && (ctxt->d & String)) {
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/* All REP prefixes have the same first termination condition */
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if (address_mask(ctxt, reg_read(ctxt, VCPU_REGS_RCX)) == 0) {
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ctxt->eip = ctxt->_eip;
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if (unlikely(ctxt->guest_mode) && ctxt->intercept) {
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rc = emulator_check_intercept(ctxt, ctxt->intercept,
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X86_ICPT_PRE_EXCEPT);
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if (rc != X86EMUL_CONTINUE)
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goto done;
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}
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/* Privileged instruction can be executed only in CPL=0 */
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if ((ctxt->d & Priv) && ops->cpl(ctxt)) {
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rc = emulate_gp(ctxt, 0);
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goto done;
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}
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/* Instruction can only be executed in protected mode */
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if ((ctxt->d & Prot) && ctxt->mode < X86EMUL_MODE_PROT16) {
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rc = emulate_ud(ctxt);
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goto done;
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}
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/* Do instruction specific permission checks */
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if (ctxt->check_perm) {
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rc = ctxt->check_perm(ctxt);
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if (rc != X86EMUL_CONTINUE)
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goto done;
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}
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if (unlikely(ctxt->guest_mode) && ctxt->intercept) {
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rc = emulator_check_intercept(ctxt, ctxt->intercept,
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X86_ICPT_POST_EXCEPT);
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if (rc != X86EMUL_CONTINUE)
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goto done;
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}
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if (ctxt->rep_prefix && (ctxt->d & String)) {
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/* All REP prefixes have the same first termination condition */
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if (address_mask(ctxt, reg_read(ctxt, VCPU_REGS_RCX)) == 0) {
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ctxt->eip = ctxt->_eip;
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goto done;
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}
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}
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}
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if ((ctxt->src.type == OP_MEM) && !(ctxt->d & NoAccess)) {
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