arm64: topology: move store_cpu_topology() to shared code
commit 456797da79
upstream.
arm64's method of defining a default cpu topology requires only minimal
changes to apply to RISC-V also. The current arm64 implementation exits
early in a uniprocessor configuration by reading MPIDR & claiming that
uniprocessor can rely on the default values.
This is appears to be a hangover from prior to '3102bc0e6ac7 ("arm64:
topology: Stop using MPIDR for topology information")', because the
current code just assigns default values for multiprocessor systems.
With the MPIDR references removed, store_cpu_topolgy() can be moved to
the common arch_topology code.
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Родитель
fcf0f6cbb6
Коммит
d46c24f307
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@ -22,46 +22,6 @@
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#include <asm/cputype.h>
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#include <asm/topology.h>
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void store_cpu_topology(unsigned int cpuid)
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{
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struct cpu_topology *cpuid_topo = &cpu_topology[cpuid];
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u64 mpidr;
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if (cpuid_topo->package_id != -1)
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goto topology_populated;
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mpidr = read_cpuid_mpidr();
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/* Uniprocessor systems can rely on default topology values */
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if (mpidr & MPIDR_UP_BITMASK)
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return;
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/*
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* This would be the place to create cpu topology based on MPIDR.
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*
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* However, it cannot be trusted to depict the actual topology; some
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* pieces of the architecture enforce an artificial cap on Aff0 values
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* (e.g. GICv3's ICC_SGI1R_EL1 limits it to 15), leading to an
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* artificial cycling of Aff1, Aff2 and Aff3 values. IOW, these end up
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* having absolutely no relationship to the actual underlying system
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* topology, and cannot be reasonably used as core / package ID.
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*
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* If the MT bit is set, Aff0 *could* be used to define a thread ID, but
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* we still wouldn't be able to obtain a sane core ID. This means we
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* need to entirely ignore MPIDR for any topology deduction.
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*/
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cpuid_topo->thread_id = -1;
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cpuid_topo->core_id = cpuid;
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cpuid_topo->package_id = cpu_to_node(cpuid);
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pr_debug("CPU%u: cluster %d core %d thread %d mpidr %#016llx\n",
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cpuid, cpuid_topo->package_id, cpuid_topo->core_id,
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cpuid_topo->thread_id, mpidr);
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topology_populated:
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update_siblings_masks(cpuid);
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}
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#ifdef CONFIG_ACPI
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static bool __init acpi_cpu_is_threaded(int cpu)
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{
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@ -690,4 +690,23 @@ void __init init_cpu_topology(void)
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else if (of_have_populated_dt() && parse_dt_topology())
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reset_cpu_topology();
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}
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void store_cpu_topology(unsigned int cpuid)
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{
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struct cpu_topology *cpuid_topo = &cpu_topology[cpuid];
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if (cpuid_topo->package_id != -1)
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goto topology_populated;
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cpuid_topo->thread_id = -1;
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cpuid_topo->core_id = cpuid;
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cpuid_topo->package_id = cpu_to_node(cpuid);
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pr_debug("CPU%u: package %d core %d thread %d\n",
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cpuid, cpuid_topo->package_id, cpuid_topo->core_id,
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cpuid_topo->thread_id);
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topology_populated:
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update_siblings_masks(cpuid);
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}
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#endif
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