LoongArch: Simplify "BEQ/BNE foo, zero" with BEQZ/BNEZ
While B{EQ,NE}Z and B{EQ,NE} are different instructions, and the vastly
expanded range for branch destination does not really matter in the few
cases touched, use the B{EQ,NE}Z where possible for shorter lines and
better consistency (e.g. some places used "BEQ foo, zero", while some
used "BEQ zero, foo").
Signed-off-by: WANG Xuerui <git@xen0n.name>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
This commit is contained in:
WANG Xuerui
Huacai Chen
Родитель
57ce5d3eef
Коммит
d47b2dc87c
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@ -160,7 +160,7 @@ static inline int arch_atomic_sub_if_positive(int i, atomic_t *v)
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" move %1, %0 \n"
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" blt %0, $zero, 2f \n"
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" sc.w %1, %2 \n"
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" beq $zero, %1, 1b \n"
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" beqz %1, 1b \n"
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"2: \n"
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__WEAK_LLSC_MB
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: "=&r" (result), "=&r" (temp),
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@ -173,7 +173,7 @@ static inline int arch_atomic_sub_if_positive(int i, atomic_t *v)
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" move %1, %0 \n"
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" blt %0, $zero, 2f \n"
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" sc.w %1, %2 \n"
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" beq $zero, %1, 1b \n"
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" beqz %1, 1b \n"
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"2: \n"
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__WEAK_LLSC_MB
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: "=&r" (result), "=&r" (temp),
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@ -323,7 +323,7 @@ static inline long arch_atomic64_sub_if_positive(long i, atomic64_t *v)
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" move %1, %0 \n"
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" blt %0, $zero, 2f \n"
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" sc.d %1, %2 \n"
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" beq %1, $zero, 1b \n"
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" beqz %1, 1b \n"
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"2: \n"
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__WEAK_LLSC_MB
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: "=&r" (result), "=&r" (temp),
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@ -336,7 +336,7 @@ static inline long arch_atomic64_sub_if_positive(long i, atomic64_t *v)
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" move %1, %0 \n"
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" blt %0, $zero, 2f \n"
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" sc.d %1, %2 \n"
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" beq %1, $zero, 1b \n"
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" beqz %1, 1b \n"
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"2: \n"
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__WEAK_LLSC_MB
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: "=&r" (result), "=&r" (temp),
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@ -57,7 +57,7 @@ static inline unsigned long __xchg(volatile void *ptr, unsigned long x,
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" bne %0, %z3, 2f \n" \
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" move $t0, %z4 \n" \
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" " st " $t0, %1 \n" \
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" beq $zero, $t0, 1b \n" \
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" beqz $t0, 1b \n" \
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"2: \n" \
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__WEAK_LLSC_MB \
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: "=&r" (__ret), "=ZB"(*m) \
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@ -17,7 +17,7 @@
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"1: ll.w %1, %4 # __futex_atomic_op\n" \
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" " insn " \n" \
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"2: sc.w $t0, %2 \n" \
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" beq $t0, $zero, 1b \n" \
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" beqz $t0, 1b \n" \
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"3: \n" \
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" .section .fixup,\"ax\" \n" \
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"4: li.w %0, %6 \n" \
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@ -84,7 +84,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, u32 oldval, u32 newv
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" bne %1, %z4, 3f \n"
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" move $t0, %z5 \n"
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"2: sc.w $t0, %2 \n"
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" beq $zero, $t0, 1b \n"
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" beqz $t0, 1b \n"
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"3: \n"
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__WEAK_LLSC_MB
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" .section .fixup,\"ax\" \n"
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@ -80,7 +80,7 @@ vmalloc_done_load:
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* see if we need to jump to huge tlb processing.
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*/
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andi t0, ra, _PAGE_HUGE
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bne t0, zero, tlb_huge_update_load
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bnez t0, tlb_huge_update_load
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csrrd t0, LOONGARCH_CSR_BADV
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srli.d t0, t0, (PAGE_SHIFT + PTE_ORDER)
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@ -100,12 +100,12 @@ smp_pgtable_change_load:
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srli.d ra, t0, _PAGE_PRESENT_SHIFT
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andi ra, ra, 1
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beq ra, zero, nopage_tlb_load
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beqz ra, nopage_tlb_load
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ori t0, t0, _PAGE_VALID
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#ifdef CONFIG_SMP
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sc.d t0, t1, 0
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beq t0, zero, smp_pgtable_change_load
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beqz t0, smp_pgtable_change_load
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#else
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st.d t0, t1, 0
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#endif
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@ -139,13 +139,13 @@ tlb_huge_update_load:
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#endif
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srli.d ra, t0, _PAGE_PRESENT_SHIFT
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andi ra, ra, 1
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beq ra, zero, nopage_tlb_load
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beqz ra, nopage_tlb_load
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tlbsrch
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ori t0, t0, _PAGE_VALID
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#ifdef CONFIG_SMP
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sc.d t0, t1, 0
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beq t0, zero, tlb_huge_update_load
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beqz t0, tlb_huge_update_load
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ld.d t0, t1, 0
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#else
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st.d t0, t1, 0
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@ -244,7 +244,7 @@ vmalloc_done_store:
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* see if we need to jump to huge tlb processing.
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*/
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andi t0, ra, _PAGE_HUGE
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bne t0, zero, tlb_huge_update_store
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bnez t0, tlb_huge_update_store
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csrrd t0, LOONGARCH_CSR_BADV
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srli.d t0, t0, (PAGE_SHIFT + PTE_ORDER)
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@ -265,12 +265,12 @@ smp_pgtable_change_store:
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srli.d ra, t0, _PAGE_PRESENT_SHIFT
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andi ra, ra, ((_PAGE_PRESENT | _PAGE_WRITE) >> _PAGE_PRESENT_SHIFT)
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xori ra, ra, ((_PAGE_PRESENT | _PAGE_WRITE) >> _PAGE_PRESENT_SHIFT)
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bne ra, zero, nopage_tlb_store
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bnez ra, nopage_tlb_store
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ori t0, t0, (_PAGE_VALID | _PAGE_DIRTY | _PAGE_MODIFIED)
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#ifdef CONFIG_SMP
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sc.d t0, t1, 0
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beq t0, zero, smp_pgtable_change_store
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beqz t0, smp_pgtable_change_store
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#else
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st.d t0, t1, 0
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#endif
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@ -306,14 +306,14 @@ tlb_huge_update_store:
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srli.d ra, t0, _PAGE_PRESENT_SHIFT
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andi ra, ra, ((_PAGE_PRESENT | _PAGE_WRITE) >> _PAGE_PRESENT_SHIFT)
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xori ra, ra, ((_PAGE_PRESENT | _PAGE_WRITE) >> _PAGE_PRESENT_SHIFT)
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bne ra, zero, nopage_tlb_store
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bnez ra, nopage_tlb_store
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tlbsrch
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ori t0, t0, (_PAGE_VALID | _PAGE_DIRTY | _PAGE_MODIFIED)
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#ifdef CONFIG_SMP
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sc.d t0, t1, 0
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beq t0, zero, tlb_huge_update_store
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beqz t0, tlb_huge_update_store
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ld.d t0, t1, 0
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#else
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st.d t0, t1, 0
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@ -411,7 +411,7 @@ vmalloc_done_modify:
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* see if we need to jump to huge tlb processing.
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*/
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andi t0, ra, _PAGE_HUGE
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bne t0, zero, tlb_huge_update_modify
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bnez t0, tlb_huge_update_modify
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csrrd t0, LOONGARCH_CSR_BADV
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srli.d t0, t0, (PAGE_SHIFT + PTE_ORDER)
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@ -431,12 +431,12 @@ smp_pgtable_change_modify:
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srli.d ra, t0, _PAGE_WRITE_SHIFT
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andi ra, ra, 1
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beq ra, zero, nopage_tlb_modify
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beqz ra, nopage_tlb_modify
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ori t0, t0, (_PAGE_VALID | _PAGE_DIRTY | _PAGE_MODIFIED)
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#ifdef CONFIG_SMP
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sc.d t0, t1, 0
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beq t0, zero, smp_pgtable_change_modify
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beqz t0, smp_pgtable_change_modify
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#else
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st.d t0, t1, 0
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#endif
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@ -471,14 +471,14 @@ tlb_huge_update_modify:
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srli.d ra, t0, _PAGE_WRITE_SHIFT
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andi ra, ra, 1
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beq ra, zero, nopage_tlb_modify
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beqz ra, nopage_tlb_modify
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tlbsrch
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ori t0, t0, (_PAGE_VALID | _PAGE_DIRTY | _PAGE_MODIFIED)
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#ifdef CONFIG_SMP
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sc.d t0, t1, 0
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beq t0, zero, tlb_huge_update_modify
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beqz t0, tlb_huge_update_modify
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ld.d t0, t1, 0
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#else
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st.d t0, t1, 0
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