serial: max310x: Try to get crystal clock rate from property
In some configurations, mainly ACPI-based, the clock frequency of the device is supplied by very well established 'clock-frequency' property. Hence, try to get it from the property at last if no other providers are available. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20210517172930.83353-1-andriy.shevchenko@linux.intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -552,7 +552,7 @@ static int max310x_update_best_err(unsigned long f, long *besterr)
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return 1;
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}
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static int max310x_set_ref_clk(struct device *dev, struct max310x_port *s,
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static u32 max310x_set_ref_clk(struct device *dev, struct max310x_port *s,
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unsigned long freq, bool xtal)
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{
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unsigned int div, clksrc, pllcfg = 0;
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@ -618,7 +618,7 @@ static int max310x_set_ref_clk(struct device *dev, struct max310x_port *s,
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}
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}
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return (int)bestfreq;
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return bestfreq;
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}
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static void max310x_batch_write(struct uart_port *port, u8 *txbuf, unsigned int len)
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@ -1253,9 +1253,10 @@ static int max310x_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
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static int max310x_probe(struct device *dev, const struct max310x_devtype *devtype,
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struct regmap *regmap, int irq)
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{
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int i, ret, fmin, fmax, freq, uartclk;
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int i, ret, fmin, fmax, freq;
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struct max310x_port *s;
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bool xtal = false;
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u32 uartclk = 0;
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bool xtal;
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if (IS_ERR(regmap))
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return PTR_ERR(regmap);
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@ -1267,24 +1268,20 @@ static int max310x_probe(struct device *dev, const struct max310x_devtype *devty
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return -ENOMEM;
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}
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/* Always ask for fixed clock rate from a property. */
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device_property_read_u32(dev, "clock-frequency", &uartclk);
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s->clk = devm_clk_get_optional(dev, "osc");
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if (IS_ERR(s->clk))
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return PTR_ERR(s->clk);
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if (s->clk) {
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fmin = 500000;
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fmax = 35000000;
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xtal = false;
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} else {
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s->clk = devm_clk_get_optional(dev, "xtal");
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if (IS_ERR(s->clk))
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return PTR_ERR(s->clk);
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if (s->clk) {
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fmin = 1000000;
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fmax = 4000000;
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xtal = true;
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} else {
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dev_err(dev, "Cannot get clock\n");
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return -EINVAL;
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}
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xtal = true;
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}
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ret = clk_prepare_enable(s->clk);
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@ -1292,6 +1289,21 @@ static int max310x_probe(struct device *dev, const struct max310x_devtype *devty
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return ret;
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freq = clk_get_rate(s->clk);
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if (freq == 0)
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freq = uartclk;
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if (freq == 0) {
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dev_err(dev, "Cannot get clock rate\n");
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return -EINVAL;
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}
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if (xtal) {
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fmin = 1000000;
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fmax = 4000000;
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} else {
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fmin = 500000;
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fmax = 35000000;
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}
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/* Check frequency limits */
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if (freq < fmin || freq > fmax) {
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ret = -ERANGE;
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