sh-pfc: Split platform data from the sh_pfc structure
Create a sh_pfc_platform_data structure to store platform data and reference it from the core sh_pfc structure. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Paul Mundt <lethal@linux-sh.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Laurent Pinchart
Simon Horman
Родитель
e62ebcdbce
Коммит
d4e62d0094
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@ -21,18 +21,13 @@
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#include <linux/ioport.h>
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#include <linux/pinctrl/machine.h>
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static struct sh_pfc *sh_pfc __read_mostly;
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static inline bool sh_pfc_initialized(void)
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{
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return !!sh_pfc;
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}
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static struct sh_pfc sh_pfc __read_mostly;
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static void pfc_iounmap(struct sh_pfc *pfc)
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{
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int k;
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for (k = 0; k < pfc->num_resources; k++)
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for (k = 0; k < pfc->pdata->num_resources; k++)
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if (pfc->window[k].virt)
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iounmap(pfc->window[k].virt);
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@ -45,16 +40,16 @@ static int pfc_ioremap(struct sh_pfc *pfc)
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struct resource *res;
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int k;
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if (!pfc->num_resources)
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if (!pfc->pdata->num_resources)
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return 0;
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pfc->window = kzalloc(pfc->num_resources * sizeof(*pfc->window),
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pfc->window = kzalloc(pfc->pdata->num_resources * sizeof(*pfc->window),
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GFP_NOWAIT);
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if (!pfc->window)
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goto err1;
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for (k = 0; k < pfc->num_resources; k++) {
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res = pfc->resource + k;
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for (k = 0; k < pfc->pdata->num_resources; k++) {
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res = pfc->pdata->resource + k;
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WARN_ON(resource_type(res) != IORESOURCE_MEM);
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pfc->window[k].phys = res->start;
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pfc->window[k].size = resource_size(res);
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@ -79,7 +74,7 @@ static void __iomem *pfc_phys_to_virt(struct sh_pfc *pfc,
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int k;
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/* scan through physical windows and convert address */
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for (k = 0; k < pfc->num_resources; k++) {
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for (k = 0; k < pfc->pdata->num_resources; k++) {
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window = pfc->window + k;
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if (address < window->phys)
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@ -232,8 +227,8 @@ static void write_config_reg(struct sh_pfc *pfc,
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data &= mask;
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data |= value;
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if (pfc->unlock_reg)
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gpio_write_raw_reg(pfc_phys_to_virt(pfc, pfc->unlock_reg),
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if (pfc->pdata->unlock_reg)
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gpio_write_raw_reg(pfc_phys_to_virt(pfc, pfc->pdata->unlock_reg),
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32, ~data);
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gpio_write_raw_reg(mapped_reg, crp->reg_width, data);
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@ -241,16 +236,16 @@ static void write_config_reg(struct sh_pfc *pfc,
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static int setup_data_reg(struct sh_pfc *pfc, unsigned gpio)
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{
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struct pinmux_gpio *gpiop = &pfc->gpios[gpio];
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struct pinmux_gpio *gpiop = &pfc->pdata->gpios[gpio];
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struct pinmux_data_reg *data_reg;
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int k, n;
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if (!enum_in_range(gpiop->enum_id, &pfc->data))
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if (!enum_in_range(gpiop->enum_id, &pfc->pdata->data))
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return -1;
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k = 0;
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while (1) {
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data_reg = pfc->data_regs + k;
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data_reg = pfc->pdata->data_regs + k;
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if (!data_reg->reg_width)
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break;
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@ -279,12 +274,12 @@ static void setup_data_regs(struct sh_pfc *pfc)
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struct pinmux_data_reg *drp;
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int k;
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for (k = pfc->first_gpio; k <= pfc->last_gpio; k++)
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for (k = pfc->pdata->first_gpio; k <= pfc->pdata->last_gpio; k++)
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setup_data_reg(pfc, k);
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k = 0;
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while (1) {
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drp = pfc->data_regs + k;
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drp = pfc->pdata->data_regs + k;
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if (!drp->reg_width)
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break;
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@ -298,15 +293,15 @@ static void setup_data_regs(struct sh_pfc *pfc)
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int sh_pfc_get_data_reg(struct sh_pfc *pfc, unsigned gpio,
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struct pinmux_data_reg **drp, int *bitp)
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{
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struct pinmux_gpio *gpiop = &pfc->gpios[gpio];
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struct pinmux_gpio *gpiop = &pfc->pdata->gpios[gpio];
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int k, n;
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if (!enum_in_range(gpiop->enum_id, &pfc->data))
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if (!enum_in_range(gpiop->enum_id, &pfc->pdata->data))
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return -1;
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k = (gpiop->flags & PINMUX_FLAG_DREG) >> PINMUX_FLAG_DREG_SHIFT;
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n = (gpiop->flags & PINMUX_FLAG_DBIT) >> PINMUX_FLAG_DBIT_SHIFT;
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*drp = pfc->data_regs + k;
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*drp = pfc->pdata->data_regs + k;
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*bitp = n;
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return 0;
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}
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@ -323,7 +318,7 @@ static int get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id,
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k = 0;
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while (1) {
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config_reg = pfc->cfg_regs + k;
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config_reg = pfc->pdata->cfg_regs + k;
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r_width = config_reg->reg_width;
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f_width = config_reg->field_width;
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@ -361,12 +356,12 @@ static int get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id,
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int sh_pfc_gpio_to_enum(struct sh_pfc *pfc, unsigned gpio, int pos,
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pinmux_enum_t *enum_idp)
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{
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pinmux_enum_t enum_id = pfc->gpios[gpio].enum_id;
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pinmux_enum_t *data = pfc->gpio_data;
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pinmux_enum_t enum_id = pfc->pdata->gpios[gpio].enum_id;
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pinmux_enum_t *data = pfc->pdata->gpio_data;
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int k;
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if (!enum_in_range(enum_id, &pfc->data)) {
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if (!enum_in_range(enum_id, &pfc->mark)) {
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if (!enum_in_range(enum_id, &pfc->pdata->data)) {
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if (!enum_in_range(enum_id, &pfc->pdata->mark)) {
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pr_err("non data/mark enum_id for gpio %d\n", gpio);
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return -1;
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}
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@ -377,7 +372,7 @@ int sh_pfc_gpio_to_enum(struct sh_pfc *pfc, unsigned gpio, int pos,
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return pos + 1;
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}
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for (k = 0; k < pfc->gpio_data_size; k++) {
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for (k = 0; k < pfc->pdata->gpio_data_size; k++) {
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if (data[k] == enum_id) {
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*enum_idp = data[k + 1];
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return k + 1;
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@ -405,19 +400,19 @@ int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
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break;
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case PINMUX_TYPE_OUTPUT:
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range = &pfc->output;
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range = &pfc->pdata->output;
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break;
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case PINMUX_TYPE_INPUT:
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range = &pfc->input;
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range = &pfc->pdata->input;
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break;
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case PINMUX_TYPE_INPUT_PULLUP:
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range = &pfc->input_pu;
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range = &pfc->pdata->input_pu;
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break;
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case PINMUX_TYPE_INPUT_PULLDOWN:
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range = &pfc->input_pd;
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range = &pfc->pdata->input_pd;
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break;
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default:
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@ -437,7 +432,7 @@ int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
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break;
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/* first check if this is a function enum */
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in_range = enum_in_range(enum_id, &pfc->function);
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in_range = enum_in_range(enum_id, &pfc->pdata->function);
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if (!in_range) {
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/* not a function enum */
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if (range) {
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@ -502,7 +497,7 @@ int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
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}
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EXPORT_SYMBOL_GPL(sh_pfc_config_gpio);
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int register_sh_pfc(struct sh_pfc *pfc)
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int register_sh_pfc(struct sh_pfc_platform_data *pdata)
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{
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int (*initroutine)(struct sh_pfc *) = NULL;
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int ret;
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@ -512,26 +507,28 @@ int register_sh_pfc(struct sh_pfc *pfc)
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*/
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BUILD_BUG_ON(PINMUX_FLAG_TYPE > ((1 << PINMUX_FLAG_DBIT_SHIFT) - 1));
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if (sh_pfc)
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if (sh_pfc.pdata)
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return -EBUSY;
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ret = pfc_ioremap(pfc);
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if (unlikely(ret < 0))
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return ret;
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sh_pfc.pdata = pdata;
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spin_lock_init(&pfc->lock);
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ret = pfc_ioremap(&sh_pfc);
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if (unlikely(ret < 0)) {
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sh_pfc.pdata = NULL;
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return ret;
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}
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spin_lock_init(&sh_pfc.lock);
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pinctrl_provide_dummies();
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setup_data_regs(pfc);
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sh_pfc = pfc;
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setup_data_regs(&sh_pfc);
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/*
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* Initialize pinctrl bindings first
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*/
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initroutine = symbol_request(sh_pfc_register_pinctrl);
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if (initroutine) {
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ret = (*initroutine)(pfc);
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ret = (*initroutine)(&sh_pfc);
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symbol_put_addr(initroutine);
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if (unlikely(ret != 0))
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@ -546,7 +543,7 @@ int register_sh_pfc(struct sh_pfc *pfc)
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*/
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initroutine = symbol_request(sh_pfc_register_gpiochip);
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if (initroutine) {
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ret = (*initroutine)(pfc);
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ret = (*initroutine)(&sh_pfc);
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symbol_put_addr(initroutine);
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/*
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@ -560,13 +557,13 @@ int register_sh_pfc(struct sh_pfc *pfc)
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}
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}
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pr_info("%s support registered\n", pfc->name);
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pr_info("%s support registered\n", sh_pfc.pdata->name);
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return 0;
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err:
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pfc_iounmap(pfc);
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sh_pfc = NULL;
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pfc_iounmap(&sh_pfc);
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sh_pfc.pdata = NULL;
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return ret;
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}
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@ -103,11 +103,11 @@ static int sh_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
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if (pos <= 0 || !enum_id)
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break;
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for (i = 0; i < pfc->gpio_irq_size; i++) {
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enum_ids = pfc->gpio_irq[i].enum_ids;
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for (i = 0; i < pfc->pdata->gpio_irq_size; i++) {
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enum_ids = pfc->pdata->gpio_irq[i].enum_ids;
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for (k = 0; enum_ids[k]; k++) {
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if (enum_ids[k] == enum_id)
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return pfc->gpio_irq[i].irq;
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return pfc->pdata->gpio_irq[i].irq;
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}
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}
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}
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@ -128,12 +128,12 @@ static void sh_pfc_gpio_setup(struct sh_pfc_chip *chip)
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gc->set = sh_gpio_set;
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gc->to_irq = sh_gpio_to_irq;
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WARN_ON(pfc->first_gpio != 0); /* needs testing */
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WARN_ON(pfc->pdata->first_gpio != 0); /* needs testing */
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gc->label = pfc->name;
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gc->label = pfc->pdata->name;
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gc->owner = THIS_MODULE;
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gc->base = pfc->first_gpio;
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gc->ngpio = (pfc->last_gpio - pfc->first_gpio) + 1;
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gc->base = pfc->pdata->first_gpio;
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gc->ngpio = (pfc->pdata->last_gpio - pfc->pdata->first_gpio) + 1;
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}
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int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
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@ -154,7 +154,8 @@ int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
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kfree(chip);
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pr_info("%s handling gpio %d -> %d\n",
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pfc->name, pfc->first_gpio, pfc->last_gpio);
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pfc->pdata->name, pfc->pdata->first_gpio,
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pfc->pdata->last_gpio);
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return ret;
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}
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@ -179,7 +180,7 @@ static int sh_pfc_gpio_probe(struct platform_device *pdev)
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chip = gpio_to_pfc_chip(gc);
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platform_set_drvdata(pdev, chip);
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pr_info("attaching to GPIO chip %s\n", chip->pfc->name);
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pr_info("attaching to GPIO chip %s\n", chip->pfc->pdata->name);
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return 0;
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}
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@ -140,7 +140,7 @@ static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset,
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spin_lock_irqsave(&pfc->lock, flags);
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pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE;
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pinmux_type = pfc->pdata->gpios[offset].flags & PINMUX_FLAG_TYPE;
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/*
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* See if the present config needs to first be de-configured.
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@ -172,8 +172,8 @@ static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset,
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GPIO_CFG_REQ) != 0)
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goto err;
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pfc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
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pfc->gpios[offset].flags |= new_type;
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pfc->pdata->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
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pfc->pdata->gpios[offset].flags |= new_type;
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ret = 0;
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@ -195,7 +195,7 @@ static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev,
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spin_lock_irqsave(&pfc->lock, flags);
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pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE;
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pinmux_type = pfc->pdata->gpios[offset].flags & PINMUX_FLAG_TYPE;
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switch (pinmux_type) {
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case PINMUX_TYPE_FUNCTION:
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@ -236,7 +236,7 @@ static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev,
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spin_lock_irqsave(&pfc->lock, flags);
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pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE;
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pinmux_type = pfc->pdata->gpios[offset].flags & PINMUX_FLAG_TYPE;
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sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);
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@ -270,7 +270,7 @@ static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin,
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struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
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struct sh_pfc *pfc = pmx->pfc;
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*config = pfc->gpios[pin].flags & PINMUX_FLAG_TYPE;
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*config = pfc->pdata->gpios[pin].flags & PINMUX_FLAG_TYPE;
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return 0;
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}
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@ -356,7 +356,7 @@ static int sh_pfc_map_gpios(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
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unsigned long flags;
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int i;
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pmx->nr_pads = pfc->last_gpio - pfc->first_gpio + 1;
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pmx->nr_pads = pfc->pdata->last_gpio - pfc->pdata->first_gpio + 1;
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pmx->pads = kmalloc(sizeof(struct pinctrl_pin_desc) * pmx->nr_pads,
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GFP_KERNEL);
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@ -375,9 +375,9 @@ static int sh_pfc_map_gpios(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
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*/
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for (i = 0; i < pmx->nr_pads; i++) {
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struct pinctrl_pin_desc *pin = pmx->pads + i;
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struct pinmux_gpio *gpio = pfc->gpios + i;
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struct pinmux_gpio *gpio = pfc->pdata->gpios + i;
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pin->number = pfc->first_gpio + i;
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pin->number = pfc->pdata->first_gpio + i;
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pin->name = gpio->name;
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/* XXX */
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@ -408,7 +408,7 @@ static int sh_pfc_map_functions(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
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spin_lock_irqsave(&pmx->lock, flags);
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for (i = fn = 0; i < pmx->nr_pads; i++) {
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struct pinmux_gpio *gpio = pfc->gpios + i;
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struct pinmux_gpio *gpio = pfc->pdata->gpios + i;
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if ((gpio->flags & PINMUX_FLAG_TYPE) == PINMUX_TYPE_FUNCTION)
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pmx->functions[fn++] = gpio;
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@ -444,9 +444,10 @@ static int sh_pfc_pinctrl_probe(struct platform_device *pdev)
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goto free_functions;
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}
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sh_pfc_gpio_range.npins = pfc->last_gpio - pfc->first_gpio + 1;
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sh_pfc_gpio_range.base = pfc->first_gpio;
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||||
sh_pfc_gpio_range.pin_base = pfc->first_gpio;
|
||||
sh_pfc_gpio_range.npins = pfc->pdata->last_gpio
|
||||
- pfc->pdata->first_gpio + 1;
|
||||
sh_pfc_gpio_range.base = pfc->pdata->first_gpio;
|
||||
sh_pfc_gpio_range.pin_base = pfc->pdata->first_gpio;
|
||||
|
||||
pinctrl_add_gpio_range(sh_pfc_pmx->pctl, &sh_pfc_gpio_range);
|
||||
|
||||
|
|
|
|||
|
|
@ -94,7 +94,7 @@ struct pfc_window {
|
|||
unsigned long size;
|
||||
};
|
||||
|
||||
struct sh_pfc {
|
||||
struct sh_pfc_platform_data {
|
||||
char *name;
|
||||
pinmux_enum_t reserved_id;
|
||||
struct pinmux_range data;
|
||||
|
|
@ -117,17 +117,21 @@ struct sh_pfc {
|
|||
struct pinmux_irq *gpio_irq;
|
||||
unsigned int gpio_irq_size;
|
||||
|
||||
spinlock_t lock;
|
||||
|
||||
struct resource *resource;
|
||||
unsigned int num_resources;
|
||||
struct pfc_window *window;
|
||||
|
||||
unsigned long unlock_reg;
|
||||
};
|
||||
|
||||
struct sh_pfc {
|
||||
struct sh_pfc_platform_data *pdata;
|
||||
spinlock_t lock;
|
||||
|
||||
struct pfc_window *window;
|
||||
};
|
||||
|
||||
/* XXX compat for now */
|
||||
#define pinmux_info sh_pfc
|
||||
#define pinmux_info sh_pfc_platform_data
|
||||
|
||||
/* drivers/sh/pfc/gpio.c */
|
||||
int sh_pfc_register_gpiochip(struct sh_pfc *pfc);
|
||||
|
|
@ -136,7 +140,7 @@ int sh_pfc_register_gpiochip(struct sh_pfc *pfc);
|
|||
int sh_pfc_register_pinctrl(struct sh_pfc *pfc);
|
||||
|
||||
/* drivers/sh/pfc/core.c */
|
||||
int register_sh_pfc(struct sh_pfc *pfc);
|
||||
int register_sh_pfc(struct sh_pfc_platform_data *pfc);
|
||||
|
||||
int sh_pfc_read_bit(struct pinmux_data_reg *dr, unsigned long in_pos);
|
||||
void sh_pfc_write_bit(struct pinmux_data_reg *dr, unsigned long in_pos,
|
||||
|
|
@ -151,8 +155,8 @@ int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
|
|||
/* xxx */
|
||||
static inline int register_pinmux(struct pinmux_info *pip)
|
||||
{
|
||||
struct sh_pfc *pfc = pip;
|
||||
return register_sh_pfc(pfc);
|
||||
struct sh_pfc_platform_data *pdata = pip;
|
||||
return register_sh_pfc(pdata);
|
||||
}
|
||||
|
||||
enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE };
|
||||
|
|
|
|||
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Ссылка в новой задаче