drm/i915: Refactor execbuffer relocation writing
With the introduction of the reloc page cache, we are just one step away from refactoring the relocation write functions into one. Not only does it tidy the code (slightly), but it greatly simplifies the control logic much to gcc's satisfaction. v2: Add selftests to document the relationship between the clflush flags, the KMAP bit and packing into the page-aligned pointer. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20160818161718.27187-13-chris@chris-wilson.co.uk
This commit is contained in:
Chris Wilson
Родитель
b0dc465f95
Коммит
d50415cc6c
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@ -39,6 +39,8 @@
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#include "intel_drv.h"
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#include "intel_frontbuffer.h"
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#define DBG_USE_CPU_RELOC 0 /* -1 force GTT relocs; 1 force CPU relocs */
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#define __EXEC_OBJECT_HAS_PIN (1<<31)
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#define __EXEC_OBJECT_HAS_FENCE (1<<30)
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#define __EXEC_OBJECT_NEEDS_MAP (1<<29)
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@ -59,6 +61,7 @@ struct i915_execbuffer_params {
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};
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struct eb_vmas {
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struct drm_i915_private *i915;
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struct list_head vmas;
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int and;
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union {
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@ -68,7 +71,8 @@ struct eb_vmas {
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};
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static struct eb_vmas *
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eb_create(struct drm_i915_gem_execbuffer2 *args)
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eb_create(struct drm_i915_private *i915,
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struct drm_i915_gem_execbuffer2 *args)
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{
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struct eb_vmas *eb = NULL;
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@ -95,6 +99,7 @@ eb_create(struct drm_i915_gem_execbuffer2 *args)
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} else
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eb->and = -args->buffer_count;
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eb->i915 = i915;
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INIT_LIST_HEAD(&eb->vmas);
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return eb;
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}
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@ -278,6 +283,9 @@ static void eb_destroy(struct eb_vmas *eb)
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static inline int use_cpu_reloc(struct drm_i915_gem_object *obj)
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{
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if (DBG_USE_CPU_RELOC)
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return DBG_USE_CPU_RELOC > 0;
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return (HAS_LLC(obj->base.dev) ||
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obj->base.write_domain == I915_GEM_DOMAIN_CPU ||
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obj->cache_level != I915_CACHE_NONE);
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@ -302,37 +310,58 @@ static inline uint64_t gen8_noncanonical_addr(uint64_t address)
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}
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static inline uint64_t
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relocation_target(struct drm_i915_gem_relocation_entry *reloc,
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relocation_target(const struct drm_i915_gem_relocation_entry *reloc,
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uint64_t target_offset)
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{
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return gen8_canonical_addr((int)reloc->delta + target_offset);
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}
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struct reloc_cache {
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void *vaddr;
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struct drm_i915_private *i915;
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struct drm_mm_node node;
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unsigned long vaddr;
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unsigned int page;
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enum { KMAP, IOMAP } type;
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bool use_64bit_reloc;
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};
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static void reloc_cache_init(struct reloc_cache *cache)
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static void reloc_cache_init(struct reloc_cache *cache,
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struct drm_i915_private *i915)
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{
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cache->page = -1;
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cache->vaddr = NULL;
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cache->vaddr = 0;
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cache->i915 = i915;
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cache->use_64bit_reloc = INTEL_GEN(cache->i915) >= 8;
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}
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static inline void *unmask_page(unsigned long p)
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{
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return (void *)(uintptr_t)(p & PAGE_MASK);
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}
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static inline unsigned int unmask_flags(unsigned long p)
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{
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return p & ~PAGE_MASK;
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}
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#define KMAP 0x4 /* after CLFLUSH_FLAGS */
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static void reloc_cache_fini(struct reloc_cache *cache)
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{
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void *vaddr;
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if (!cache->vaddr)
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return;
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switch (cache->type) {
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case KMAP:
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kunmap_atomic(cache->vaddr);
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break;
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vaddr = unmask_page(cache->vaddr);
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if (cache->vaddr & KMAP) {
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if (cache->vaddr & CLFLUSH_AFTER)
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mb();
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case IOMAP:
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io_mapping_unmap_atomic(cache->vaddr);
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break;
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kunmap_atomic(vaddr);
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i915_gem_obj_finish_shmem_access((struct drm_i915_gem_object *)cache->node.mm);
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} else {
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io_mapping_unmap_atomic((void __iomem *)vaddr);
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i915_vma_unpin((struct i915_vma *)cache->node.mm);
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}
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}
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@ -340,147 +369,142 @@ static void *reloc_kmap(struct drm_i915_gem_object *obj,
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struct reloc_cache *cache,
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int page)
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{
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if (cache->page == page)
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return cache->vaddr;
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void *vaddr;
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if (cache->vaddr)
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kunmap_atomic(cache->vaddr);
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if (cache->vaddr) {
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kunmap_atomic(unmask_page(cache->vaddr));
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} else {
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unsigned int flushes;
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int ret;
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ret = i915_gem_obj_prepare_shmem_write(obj, &flushes);
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if (ret)
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return ERR_PTR(ret);
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BUILD_BUG_ON(KMAP & CLFLUSH_FLAGS);
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BUILD_BUG_ON((KMAP | CLFLUSH_FLAGS) & PAGE_MASK);
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cache->vaddr = flushes | KMAP;
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cache->node.mm = (void *)obj;
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if (flushes)
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mb();
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}
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vaddr = kmap_atomic(i915_gem_object_get_dirty_page(obj, page));
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cache->vaddr = unmask_flags(cache->vaddr) | (unsigned long)vaddr;
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cache->page = page;
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cache->vaddr = kmap_atomic(i915_gem_object_get_dirty_page(obj, page));
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cache->type = KMAP;
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return cache->vaddr;
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return vaddr;
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}
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static int
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relocate_entry_cpu(struct drm_i915_gem_object *obj,
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struct drm_i915_gem_relocation_entry *reloc,
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struct reloc_cache *cache,
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uint64_t target_offset)
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{
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struct drm_device *dev = obj->base.dev;
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uint32_t page_offset = offset_in_page(reloc->offset);
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uint64_t delta = relocation_target(reloc, target_offset);
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char *vaddr;
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int ret;
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ret = i915_gem_object_set_to_cpu_domain(obj, true);
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if (ret)
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return ret;
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vaddr = reloc_kmap(obj, cache, reloc->offset >> PAGE_SHIFT);
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*(uint32_t *)(vaddr + page_offset) = lower_32_bits(delta);
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if (INTEL_GEN(dev) >= 8) {
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page_offset += sizeof(uint32_t);
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if (page_offset == PAGE_SIZE) {
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vaddr = reloc_kmap(obj, cache, cache->page + 1);
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page_offset = 0;
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}
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*(uint32_t *)(vaddr + page_offset) = upper_32_bits(delta);
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}
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return 0;
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}
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static void *reloc_iomap(struct drm_i915_private *i915,
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static void *reloc_iomap(struct drm_i915_gem_object *obj,
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struct reloc_cache *cache,
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uint64_t offset)
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int page)
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{
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if (cache->page == offset >> PAGE_SHIFT)
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return cache->vaddr;
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void *vaddr;
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if (cache->vaddr)
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io_mapping_unmap_atomic(cache->vaddr);
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if (cache->vaddr) {
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io_mapping_unmap_atomic(unmask_page(cache->vaddr));
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} else {
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struct i915_vma *vma;
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int ret;
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cache->page = offset >> PAGE_SHIFT;
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cache->vaddr =
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io_mapping_map_atomic_wc(i915->ggtt.mappable,
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offset & PAGE_MASK);
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cache->type = IOMAP;
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if (use_cpu_reloc(obj))
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return NULL;
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return cache->vaddr;
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}
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ret = i915_gem_object_set_to_gtt_domain(obj, true);
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if (ret)
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return ERR_PTR(ret);
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static int
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relocate_entry_gtt(struct drm_i915_gem_object *obj,
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struct drm_i915_gem_relocation_entry *reloc,
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struct reloc_cache *cache,
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uint64_t target_offset)
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{
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struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
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struct i915_vma *vma;
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uint64_t delta = relocation_target(reloc, target_offset);
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uint64_t offset;
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void __iomem *reloc_page;
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int ret;
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vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0,
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PIN_MAPPABLE | PIN_NONBLOCK);
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if (IS_ERR(vma))
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return NULL;
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vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, PIN_MAPPABLE);
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if (IS_ERR(vma))
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return PTR_ERR(vma);
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ret = i915_gem_object_put_fence(obj);
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if (ret) {
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i915_vma_unpin(vma);
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return ERR_PTR(ret);
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}
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ret = i915_gem_object_set_to_gtt_domain(obj, true);
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if (ret)
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goto unpin;
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ret = i915_gem_object_put_fence(obj);
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if (ret)
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goto unpin;
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/* Map the page containing the relocation we're going to perform. */
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offset = vma->node.start + reloc->offset;
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reloc_page = reloc_iomap(dev_priv, cache, offset);
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iowrite32(lower_32_bits(delta), reloc_page + offset_in_page(offset));
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if (INTEL_GEN(dev_priv) >= 8) {
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offset += sizeof(uint32_t);
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if (offset_in_page(offset) == 0)
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reloc_page = reloc_iomap(dev_priv, cache, offset);
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iowrite32(upper_32_bits(delta),
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reloc_page + offset_in_page(offset));
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cache->node.start = vma->node.start;
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cache->node.mm = (void *)vma;
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}
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unpin:
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__i915_vma_unpin(vma);
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return ret;
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vaddr = io_mapping_map_atomic_wc(cache->i915->ggtt.mappable,
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cache->node.start + (page << PAGE_SHIFT));
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cache->page = page;
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cache->vaddr = (unsigned long)vaddr;
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return vaddr;
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}
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static void
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clflush_write32(void *addr, uint32_t value)
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static void *reloc_vaddr(struct drm_i915_gem_object *obj,
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struct reloc_cache *cache,
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int page)
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{
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/* This is not a fast path, so KISS. */
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drm_clflush_virt_range(addr, sizeof(uint32_t));
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*(uint32_t *)addr = value;
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drm_clflush_virt_range(addr, sizeof(uint32_t));
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void *vaddr;
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if (cache->page == page) {
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vaddr = unmask_page(cache->vaddr);
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} else {
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vaddr = NULL;
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if ((cache->vaddr & KMAP) == 0)
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vaddr = reloc_iomap(obj, cache, page);
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if (!vaddr)
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vaddr = reloc_kmap(obj, cache, page);
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}
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return vaddr;
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}
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static void clflush_write32(u32 *addr, u32 value, unsigned int flushes)
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{
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if (unlikely(flushes & (CLFLUSH_BEFORE | CLFLUSH_AFTER))) {
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if (flushes & CLFLUSH_BEFORE) {
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clflushopt(addr);
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mb();
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}
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*addr = value;
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/* Writes to the same cacheline are serialised by the CPU
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* (including clflush). On the write path, we only require
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* that it hits memory in an orderly fashion and place
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* mb barriers at the start and end of the relocation phase
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* to ensure ordering of clflush wrt to the system.
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*/
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if (flushes & CLFLUSH_AFTER)
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clflushopt(addr);
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} else
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*addr = value;
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}
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static int
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relocate_entry_clflush(struct drm_i915_gem_object *obj,
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struct drm_i915_gem_relocation_entry *reloc,
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struct reloc_cache *cache,
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uint64_t target_offset)
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relocate_entry(struct drm_i915_gem_object *obj,
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const struct drm_i915_gem_relocation_entry *reloc,
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struct reloc_cache *cache,
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u64 target_offset)
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{
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struct drm_device *dev = obj->base.dev;
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uint32_t page_offset = offset_in_page(reloc->offset);
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uint64_t delta = relocation_target(reloc, target_offset);
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char *vaddr;
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int ret;
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u64 offset = reloc->offset;
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bool wide = cache->use_64bit_reloc;
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void *vaddr;
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ret = i915_gem_object_set_to_gtt_domain(obj, true);
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if (ret)
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return ret;
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target_offset = relocation_target(reloc, target_offset);
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repeat:
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vaddr = reloc_vaddr(obj, cache, offset >> PAGE_SHIFT);
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if (IS_ERR(vaddr))
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return PTR_ERR(vaddr);
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vaddr = reloc_kmap(obj, cache, reloc->offset >> PAGE_SHIFT);
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clflush_write32(vaddr + page_offset, lower_32_bits(delta));
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clflush_write32(vaddr + offset_in_page(offset),
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lower_32_bits(target_offset),
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cache->vaddr);
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if (INTEL_GEN(dev) >= 8) {
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page_offset += sizeof(uint32_t);
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if (page_offset == PAGE_SIZE) {
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vaddr = reloc_kmap(obj, cache, cache->page + 1);
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page_offset = 0;
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}
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clflush_write32(vaddr + page_offset, upper_32_bits(delta));
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if (wide) {
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offset += sizeof(u32);
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target_offset >>= 32;
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wide = false;
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goto repeat;
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}
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return 0;
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@ -567,7 +591,7 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
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/* Check that the relocation address is valid... */
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if (unlikely(reloc->offset >
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obj->base.size - (INTEL_INFO(dev)->gen >= 8 ? 8 : 4))) {
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obj->base.size - (cache->use_64bit_reloc ? 8 : 4))) {
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DRM_DEBUG("Relocation beyond object bounds: "
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"obj %p target %d offset %d size %d.\n",
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obj, reloc->target_handle,
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@ -587,23 +611,12 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
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if (pagefault_disabled() && !object_is_idle(obj))
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return -EFAULT;
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if (use_cpu_reloc(obj))
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ret = relocate_entry_cpu(obj, reloc, cache, target_offset);
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else if (obj->map_and_fenceable)
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ret = relocate_entry_gtt(obj, reloc, cache, target_offset);
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else if (static_cpu_has(X86_FEATURE_CLFLUSH))
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ret = relocate_entry_clflush(obj, reloc, cache, target_offset);
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else {
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WARN_ONCE(1, "Impossible case in relocation handling\n");
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ret = -ENODEV;
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}
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ret = relocate_entry(obj, reloc, cache, target_offset);
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if (ret)
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return ret;
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/* and update the user's relocation entry */
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reloc->presumed_offset = target_offset;
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return 0;
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}
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@ -619,7 +632,7 @@ i915_gem_execbuffer_relocate_vma(struct i915_vma *vma,
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int remain, ret = 0;
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user_relocs = u64_to_user_ptr(entry->relocs_ptr);
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reloc_cache_init(&cache);
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reloc_cache_init(&cache, eb->i915);
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remain = entry->relocation_count;
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while (remain) {
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@ -668,7 +681,7 @@ i915_gem_execbuffer_relocate_vma_slow(struct i915_vma *vma,
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struct reloc_cache cache;
|
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int i, ret = 0;
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|
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reloc_cache_init(&cache);
|
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reloc_cache_init(&cache, eb->i915);
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for (i = 0; i < entry->relocation_count; i++) {
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ret = i915_gem_execbuffer_relocate_entry(vma->obj, eb, &relocs[i], &cache);
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if (ret)
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@ -1647,7 +1660,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
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memset(¶ms_master, 0x00, sizeof(params_master));
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eb = eb_create(args);
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eb = eb_create(dev_priv, args);
|
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if (eb == NULL) {
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i915_gem_context_put(ctx);
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mutex_unlock(&dev->struct_mutex);
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|
|
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