irqchip/dw-apb-ictl: Refactor priot to introducing hierarchical irq domains

Add the required abstractions that will help introducing hierarchical
domain support to the dw-apb-ictl driver.

No functional change.

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
[maz: commit message, some cleanups]
Signed-off-by: Marc Zyngier <maz@kernel.org>
Tested-by: Haoyu Lv <lvhaoyu@huawei.com>
Link: https://lore.kernel.org/r/20200924071754.4509-3-thunder.leizhen@huawei.com
This commit is contained in:
Zhen Lei 2020-09-24 15:17:50 +08:00 коммит произвёл Marc Zyngier
Родитель ea0c80d176
Коммит d59f7d1598
1 изменённых файлов: 11 добавлений и 8 удалений

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@ -26,7 +26,7 @@
#define APB_INT_FINALSTATUS_H 0x34 #define APB_INT_FINALSTATUS_H 0x34
#define APB_INT_BASE_OFFSET 0x04 #define APB_INT_BASE_OFFSET 0x04
static void dw_apb_ictl_handler(struct irq_desc *desc) static void dw_apb_ictl_handle_irq_cascaded(struct irq_desc *desc)
{ {
struct irq_domain *d = irq_desc_get_handler_data(desc); struct irq_domain *d = irq_desc_get_handler_data(desc);
struct irq_chip *chip = irq_desc_get_chip(desc); struct irq_chip *chip = irq_desc_get_chip(desc);
@ -43,7 +43,7 @@ static void dw_apb_ictl_handler(struct irq_desc *desc)
u32 virq = irq_find_mapping(d, gc->irq_base + hwirq); u32 virq = irq_find_mapping(d, gc->irq_base + hwirq);
generic_handle_irq(virq); generic_handle_irq(virq);
stat &= ~(1 << hwirq); stat &= ~BIT(hwirq);
} }
} }
@ -68,17 +68,20 @@ static void dw_apb_ictl_resume(struct irq_data *d)
static int __init dw_apb_ictl_init(struct device_node *np, static int __init dw_apb_ictl_init(struct device_node *np,
struct device_node *parent) struct device_node *parent)
{ {
const struct irq_domain_ops *domain_ops;
unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN; unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
struct resource r; struct resource r;
struct irq_domain *domain; struct irq_domain *domain;
struct irq_chip_generic *gc; struct irq_chip_generic *gc;
void __iomem *iobase; void __iomem *iobase;
int ret, nrirqs, irq, i; int ret, nrirqs, parent_irq, i;
u32 reg; u32 reg;
domain_ops = &irq_generic_chip_ops;
/* Map the parent interrupt for the chained handler */ /* Map the parent interrupt for the chained handler */
irq = irq_of_parse_and_map(np, 0); parent_irq = irq_of_parse_and_map(np, 0);
if (irq <= 0) { if (parent_irq <= 0) {
pr_err("%pOF: unable to parse irq\n", np); pr_err("%pOF: unable to parse irq\n", np);
return -EINVAL; return -EINVAL;
} }
@ -120,8 +123,7 @@ static int __init dw_apb_ictl_init(struct device_node *np,
else else
nrirqs = fls(readl_relaxed(iobase + APB_INT_ENABLE_L)); nrirqs = fls(readl_relaxed(iobase + APB_INT_ENABLE_L));
domain = irq_domain_add_linear(np, nrirqs, domain = irq_domain_add_linear(np, nrirqs, domain_ops, NULL);
&irq_generic_chip_ops, NULL);
if (!domain) { if (!domain) {
pr_err("%pOF: unable to add irq domain\n", np); pr_err("%pOF: unable to add irq domain\n", np);
ret = -ENOMEM; ret = -ENOMEM;
@ -146,7 +148,8 @@ static int __init dw_apb_ictl_init(struct device_node *np,
gc->chip_types[0].chip.irq_resume = dw_apb_ictl_resume; gc->chip_types[0].chip.irq_resume = dw_apb_ictl_resume;
} }
irq_set_chained_handler_and_data(irq, dw_apb_ictl_handler, domain); irq_set_chained_handler_and_data(parent_irq,
dw_apb_ictl_handle_irq_cascaded, domain);
return 0; return 0;