For MIPS32/MIPS64 cp0.config.mt == 1 implies a standard (R4k-style)
TLB, so no need to set it separately for each implementation. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -422,7 +422,7 @@ static inline unsigned int decode_config0(struct cpuinfo_mips *c)
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config0 = read_c0_config();
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if (((config0 & MIPS_CONF_MT) >> 7) == 1)
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c->options |= MIPS_CPU_TLB;
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c->options |= MIPS_CPU_TLB | MIPS_CPU_4KTLB;
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isa = (config0 & MIPS_CONF_AT) >> 13;
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switch (isa) {
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case 0:
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@ -510,7 +510,6 @@ static inline void decode_configs(struct cpuinfo_mips *c)
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static inline void cpu_probe_mips(struct cpuinfo_mips *c)
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{
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decode_configs(c);
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c->options |= MIPS_CPU_4KTLB;
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switch (c->processor_id & 0xff00) {
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case PRID_IMP_4KC:
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c->cputype = CPU_4KC;
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@ -545,7 +544,6 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c)
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static inline void cpu_probe_alchemy(struct cpuinfo_mips *c)
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{
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decode_configs(c);
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c->options |= MIPS_CPU_4KTLB;
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switch (c->processor_id & 0xff00) {
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case PRID_IMP_AU1_REV1:
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case PRID_IMP_AU1_REV2:
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@ -576,7 +574,6 @@ static inline void cpu_probe_alchemy(struct cpuinfo_mips *c)
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static inline void cpu_probe_sibyte(struct cpuinfo_mips *c)
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{
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decode_configs(c);
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c->options |= MIPS_CPU_4KTLB;
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switch (c->processor_id & 0xff00) {
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case PRID_IMP_SB1:
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c->cputype = CPU_SB1;
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@ -591,7 +588,6 @@ static inline void cpu_probe_sibyte(struct cpuinfo_mips *c)
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static inline void cpu_probe_sandcraft(struct cpuinfo_mips *c)
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{
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decode_configs(c);
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c->options |= MIPS_CPU_4KTLB;
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switch (c->processor_id & 0xff00) {
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case PRID_IMP_SR71000:
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c->cputype = CPU_SR71000;
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