EDAC/i10nm: Print an extra register set of retry_rd_err_log
Sapphire Rapids server adds an extra register set for logging more retry_rd_err_log data. So add code to print the extra register set. Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com> Link: https://lore.kernel.org/all/20220722233338.341567-1-tony.luck@intel.com
This commit is contained in:
Qiuxu Zhuo
Tony Luck
Родитель
acd4cf68fe
Коммит
d5f5e49953
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@ -83,26 +83,38 @@ static u32 offsets_scrub_spr_hbm0[] = {0x2860, 0x2854, 0x2b08, 0x2858, 0x2828,
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static u32 offsets_scrub_spr_hbm1[] = {0x2c60, 0x2c54, 0x2f08, 0x2c58, 0x2c28, 0x0fa8};
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static u32 offsets_demand_icx[] = {0x22e54, 0x22e60, 0x22e64, 0x22e58, 0x22e5c, 0x20ee0};
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static u32 offsets_demand_spr[] = {0x22e54, 0x22e60, 0x22f10, 0x22e58, 0x22e5c, 0x20ee0};
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static u32 offsets_demand2_spr[] = {0x22c70, 0x22d80, 0x22f18, 0x22d58, 0x22c64, 0x20f10};
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static u32 offsets_demand_spr_hbm0[] = {0x2a54, 0x2a60, 0x2b10, 0x2a58, 0x2a5c, 0x0ee0};
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static u32 offsets_demand_spr_hbm1[] = {0x2e54, 0x2e60, 0x2f10, 0x2e58, 0x2e5c, 0x0fb0};
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static void __enable_retry_rd_err_log(struct skx_imc *imc, int chan, bool enable,
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u32 *offsets_scrub, u32 *offsets_demand)
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u32 *offsets_scrub, u32 *offsets_demand,
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u32 *offsets_demand2)
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{
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u32 s, d;
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u32 s, d, d2;
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s = I10NM_GET_REG32(imc, chan, offsets_scrub[0]);
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d = I10NM_GET_REG32(imc, chan, offsets_demand[0]);
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if (offsets_demand2)
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d2 = I10NM_GET_REG32(imc, chan, offsets_demand2[0]);
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if (enable) {
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/* Save default configurations */
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imc->chan[chan].retry_rd_err_log_s = s;
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imc->chan[chan].retry_rd_err_log_d = d;
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if (offsets_demand2)
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imc->chan[chan].retry_rd_err_log_d2 = d2;
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s &= ~RETRY_RD_ERR_LOG_NOOVER_UC;
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s |= RETRY_RD_ERR_LOG_EN;
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d &= ~RETRY_RD_ERR_LOG_NOOVER_UC;
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d |= RETRY_RD_ERR_LOG_EN;
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if (offsets_demand2) {
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d2 &= ~RETRY_RD_ERR_LOG_UC;
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d2 |= RETRY_RD_ERR_LOG_NOOVER;
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d2 |= RETRY_RD_ERR_LOG_EN;
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}
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} else {
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/* Restore default configurations */
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if (imc->chan[chan].retry_rd_err_log_s & RETRY_RD_ERR_LOG_UC)
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@ -117,10 +129,21 @@ static void __enable_retry_rd_err_log(struct skx_imc *imc, int chan, bool enable
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d |= RETRY_RD_ERR_LOG_NOOVER;
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if (!(imc->chan[chan].retry_rd_err_log_d & RETRY_RD_ERR_LOG_EN))
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d &= ~RETRY_RD_ERR_LOG_EN;
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if (offsets_demand2) {
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if (imc->chan[chan].retry_rd_err_log_d2 & RETRY_RD_ERR_LOG_UC)
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d2 |= RETRY_RD_ERR_LOG_UC;
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if (!(imc->chan[chan].retry_rd_err_log_d2 & RETRY_RD_ERR_LOG_NOOVER))
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d2 &= ~RETRY_RD_ERR_LOG_NOOVER;
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if (!(imc->chan[chan].retry_rd_err_log_d2 & RETRY_RD_ERR_LOG_EN))
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d2 &= ~RETRY_RD_ERR_LOG_EN;
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}
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}
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I10NM_SET_REG32(imc, chan, offsets_scrub[0], s);
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I10NM_SET_REG32(imc, chan, offsets_demand[0], d);
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if (offsets_demand2)
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I10NM_SET_REG32(imc, chan, offsets_demand2[0], d2);
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}
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static void enable_retry_rd_err_log(bool enable)
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@ -141,14 +164,17 @@ static void enable_retry_rd_err_log(bool enable)
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if (imc->hbm_mc) {
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__enable_retry_rd_err_log(imc, j, enable,
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res_cfg->offsets_scrub_hbm0,
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res_cfg->offsets_demand_hbm0);
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res_cfg->offsets_demand_hbm0,
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NULL);
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__enable_retry_rd_err_log(imc, j, enable,
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res_cfg->offsets_scrub_hbm1,
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res_cfg->offsets_demand_hbm1);
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res_cfg->offsets_demand_hbm1,
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NULL);
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} else {
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__enable_retry_rd_err_log(imc, j, enable,
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res_cfg->offsets_scrub,
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res_cfg->offsets_demand);
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res_cfg->offsets_demand,
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res_cfg->offsets_demand2);
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}
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}
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}
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@ -160,7 +186,10 @@ static void show_retry_rd_err_log(struct decoded_addr *res, char *msg,
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struct skx_imc *imc = &res->dev->imc[res->imc];
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u32 log0, log1, log2, log3, log4;
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u32 corr0, corr1, corr2, corr3;
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u32 lxg0, lxg1, lxg3, lxg4;
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u32 *xffsets = NULL;
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u64 log2a, log5;
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u64 lxg2a, lxg5;
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u32 *offsets;
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int n, pch;
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@ -177,8 +206,12 @@ static void show_retry_rd_err_log(struct decoded_addr *res, char *msg,
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offsets = scrub_err ? res_cfg->offsets_scrub_hbm0 :
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res_cfg->offsets_demand_hbm0;
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} else {
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offsets = scrub_err ? res_cfg->offsets_scrub :
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res_cfg->offsets_demand;
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if (scrub_err) {
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offsets = res_cfg->offsets_scrub;
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} else {
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offsets = res_cfg->offsets_demand;
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xffsets = res_cfg->offsets_demand2;
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}
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}
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log0 = I10NM_GET_REG32(imc, res->channel, offsets[0]);
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@ -187,10 +220,28 @@ static void show_retry_rd_err_log(struct decoded_addr *res, char *msg,
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log4 = I10NM_GET_REG32(imc, res->channel, offsets[4]);
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log5 = I10NM_GET_REG64(imc, res->channel, offsets[5]);
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if (xffsets) {
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lxg0 = I10NM_GET_REG32(imc, res->channel, xffsets[0]);
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lxg1 = I10NM_GET_REG32(imc, res->channel, xffsets[1]);
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lxg3 = I10NM_GET_REG32(imc, res->channel, xffsets[3]);
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lxg4 = I10NM_GET_REG32(imc, res->channel, xffsets[4]);
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lxg5 = I10NM_GET_REG64(imc, res->channel, xffsets[5]);
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}
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if (res_cfg->type == SPR) {
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log2a = I10NM_GET_REG64(imc, res->channel, offsets[2]);
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n = snprintf(msg, len, " retry_rd_err_log[%.8x %.8x %.16llx %.8x %.8x %.16llx]",
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n = snprintf(msg, len, " retry_rd_err_log[%.8x %.8x %.16llx %.8x %.8x %.16llx",
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log0, log1, log2a, log3, log4, log5);
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if (len - n > 0) {
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if (xffsets) {
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lxg2a = I10NM_GET_REG64(imc, res->channel, xffsets[2]);
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n += snprintf(msg + n, len - n, " %.8x %.8x %.16llx %.8x %.8x %.16llx]",
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lxg0, lxg1, lxg2a, lxg3, lxg4, lxg5);
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} else {
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n += snprintf(msg + n, len - n, "]");
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}
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}
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} else {
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log2 = I10NM_GET_REG32(imc, res->channel, offsets[2]);
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n = snprintf(msg, len, " retry_rd_err_log[%.8x %.8x %.8x %.8x %.8x %.16llx]",
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@ -225,9 +276,16 @@ static void show_retry_rd_err_log(struct decoded_addr *res, char *msg,
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corr3 & 0xffff, corr3 >> 16);
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/* Clear status bits */
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if (retry_rd_err_log == 2 && (log0 & RETRY_RD_ERR_LOG_OVER_UC_V)) {
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log0 &= ~RETRY_RD_ERR_LOG_OVER_UC_V;
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I10NM_SET_REG32(imc, res->channel, offsets[0], log0);
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if (retry_rd_err_log == 2) {
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if (log0 & RETRY_RD_ERR_LOG_OVER_UC_V) {
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log0 &= ~RETRY_RD_ERR_LOG_OVER_UC_V;
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I10NM_SET_REG32(imc, res->channel, offsets[0], log0);
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}
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if (xffsets && (lxg0 & RETRY_RD_ERR_LOG_OVER_UC_V)) {
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lxg0 &= ~RETRY_RD_ERR_LOG_OVER_UC_V;
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I10NM_SET_REG32(imc, res->channel, xffsets[0], lxg0);
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}
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}
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}
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@ -568,6 +626,7 @@ static struct res_config spr_cfg = {
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.offsets_scrub_hbm0 = offsets_scrub_spr_hbm0,
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.offsets_scrub_hbm1 = offsets_scrub_spr_hbm1,
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.offsets_demand = offsets_demand_spr,
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.offsets_demand2 = offsets_demand2_spr,
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.offsets_demand_hbm0 = offsets_demand_spr_hbm0,
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.offsets_demand_hbm1 = offsets_demand_spr_hbm1,
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};
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@ -86,6 +86,7 @@ struct skx_dev {
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struct pci_dev *edev;
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u32 retry_rd_err_log_s;
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u32 retry_rd_err_log_d;
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u32 retry_rd_err_log_d2;
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struct skx_dimm {
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u8 close_pg;
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u8 bank_xor_enable;
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@ -167,6 +168,7 @@ struct res_config {
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u32 *offsets_scrub_hbm0;
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u32 *offsets_scrub_hbm1;
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u32 *offsets_demand;
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u32 *offsets_demand2;
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u32 *offsets_demand_hbm0;
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u32 *offsets_demand_hbm1;
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};
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