At the moment, all our attempts to enable HS400 on Amlogic chipsets have
been unsuccessful or unreliable. Until we can figure out how to enable this
mode safely and reliably, let's force it off.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
Jerome Brunet 2019-04-23 11:02:32 +02:00 коммит произвёл Ulf Hansson
Родитель eb4d811277
Коммит d5f758f2df
1 изменённых файлов: 7 добавлений и 4 удалений

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@ -823,10 +823,6 @@ static void meson_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
if (meson_mmc_timing_is_ddr(ios))
val |= CFG_DDR;
val &= ~CFG_CHK_DS;
if (ios->timing == MMC_TIMING_MMC_HS400)
val |= CFG_CHK_DS;
err = meson_mmc_clk_set(host, ios);
if (err)
dev_err(host->dev, "Failed to set clock: %d\n,", err);
@ -1339,6 +1335,13 @@ static int meson_mmc_probe(struct platform_device *pdev)
mmc->max_segs = SD_EMMC_DESC_BUF_LEN / sizeof(struct sd_emmc_desc);
mmc->max_seg_size = mmc->max_req_size;
/*
* At the moment, we don't know how to reliably enable HS400.
* From the different datasheets, it is not even clear if this mode
* is officially supported by any of the SoCs
*/
mmc->caps2 &= ~MMC_CAP2_HS400;
/* data bounce buffer */
host->bounce_buf_size = mmc->max_req_size;
host->bounce_buf =