KVM: Portability: Move kvm_vcpu definition back to kvm.h
This patches moves kvm_vcpu definition to kvm.h, and finally kvm.h includes x86.h. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Acked-by: Carsten Otte <cotte@de.ibm.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
This commit is contained in:
Родитель
1d737c8a68
Коммит
d657a98e3c
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@ -26,7 +26,7 @@
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#include <linux/hrtimer.h>
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#include <asm/kvm.h>
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#include "iodev.h"
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#include "x86.h"
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#include "kvm.h"
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struct kvm;
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struct kvm_vcpu;
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@ -22,17 +22,13 @@
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#include "types.h"
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#include "x86.h"
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#define KVM_MAX_VCPUS 4
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#define KVM_ALIAS_SLOTS 4
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#define KVM_MEMORY_SLOTS 8
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/* memory slots that does not exposed to userspace */
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#define KVM_PRIVATE_MEM_SLOTS 4
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#define KVM_PERMILLE_MMU_PAGES 20
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#define KVM_MIN_ALLOC_MMU_PAGES 64
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#define KVM_NUM_MMU_PAGES 1024
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#define KVM_MIN_FREE_MMU_PAGES 5
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#define KVM_REFILL_PAGES 25
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#define KVM_MAX_CPUID_ENTRIES 40
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#define KVM_PIO_PAGE_OFFSET 1
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@ -41,111 +37,16 @@
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*/
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#define KVM_REQ_TLB_FLUSH 0
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#define NR_PTE_CHAIN_ENTRIES 5
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struct kvm_pte_chain {
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u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
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struct hlist_node link;
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};
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/*
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* kvm_mmu_page_role, below, is defined as:
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*
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* bits 0:3 - total guest paging levels (2-4, or zero for real mode)
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* bits 4:7 - page table level for this shadow (1-4)
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* bits 8:9 - page table quadrant for 2-level guests
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* bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode)
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* bits 17:19 - common access permissions for all ptes in this shadow page
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*/
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union kvm_mmu_page_role {
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unsigned word;
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struct {
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unsigned glevels : 4;
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unsigned level : 4;
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unsigned quadrant : 2;
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unsigned pad_for_nice_hex_output : 6;
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unsigned metaphysical : 1;
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unsigned access : 3;
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};
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};
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struct kvm_mmu_page {
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struct list_head link;
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struct hlist_node hash_link;
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/*
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* The following two entries are used to key the shadow page in the
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* hash table.
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*/
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gfn_t gfn;
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union kvm_mmu_page_role role;
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u64 *spt;
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/* hold the gfn of each spte inside spt */
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gfn_t *gfns;
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unsigned long slot_bitmap; /* One bit set per slot which has memory
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* in this shadow page.
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*/
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int multimapped; /* More than one parent_pte? */
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int root_count; /* Currently serving as active root */
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union {
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u64 *parent_pte; /* !multimapped */
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struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
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};
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};
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struct kvm_vcpu;
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extern struct kmem_cache *kvm_vcpu_cache;
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/*
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* x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
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* 32-bit). The kvm_mmu structure abstracts the details of the current mmu
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* mode.
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*/
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struct kvm_mmu {
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void (*new_cr3)(struct kvm_vcpu *vcpu);
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int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
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void (*free)(struct kvm_vcpu *vcpu);
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gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
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void (*prefetch_page)(struct kvm_vcpu *vcpu,
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struct kvm_mmu_page *page);
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hpa_t root_hpa;
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int root_level;
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int shadow_root_level;
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u64 *pae_root;
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};
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#define KVM_NR_MEM_OBJS 40
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/*
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* We don't want allocation failures within the mmu code, so we preallocate
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* enough memory for a single page fault in a cache.
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*/
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struct kvm_mmu_memory_cache {
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int nobjs;
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void *objects[KVM_NR_MEM_OBJS];
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};
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struct kvm_guest_debug {
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int enabled;
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unsigned long bp[4];
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int singlestep;
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};
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struct kvm_pio_request {
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unsigned long count;
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int cur_count;
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struct page *guest_pages[2];
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unsigned guest_page_offset;
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int in;
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int port;
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int size;
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int string;
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int down;
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int rep;
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};
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struct kvm_vcpu_stat {
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u32 pf_fixed;
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u32 pf_guest;
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@ -218,6 +119,12 @@ void kvm_io_bus_register_dev(struct kvm_io_bus *bus,
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struct kvm_vcpu_stat stat; \
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KVM_VCPU_MMIO
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struct kvm_vcpu {
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KVM_VCPU_COMM;
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struct kvm_vcpu_arch arch;
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};
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struct kvm_mem_alias {
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gfn_t base_gfn;
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unsigned long npages;
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@ -441,8 +348,4 @@ struct kvm_stats_debugfs_item {
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};
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extern struct kvm_stats_debugfs_item debugfs_entries[];
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#if defined(CONFIG_X86)
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#include "x86.h"
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#endif
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#endif
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@ -38,4 +38,17 @@ typedef unsigned long hva_t;
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typedef u64 hpa_t;
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typedef unsigned long hfn_t;
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struct kvm_pio_request {
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unsigned long count;
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int cur_count;
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struct page *guest_pages[2];
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unsigned guest_page_offset;
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int in;
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int port;
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int size;
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int string;
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int down;
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int rep;
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};
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#endif /* __KVM_TYPES_H__ */
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@ -11,8 +11,6 @@
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#ifndef KVM_X86_H
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#define KVM_X86_H
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#include "kvm.h"
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#include <linux/types.h>
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#include <linux/mm.h>
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@ -21,6 +19,8 @@
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#include <asm/desc.h>
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#include "types.h"
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#define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
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#define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
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#define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS|0xFFFFFF0000000000ULL)
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@ -54,9 +54,19 @@
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#define IOPL_SHIFT 12
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#define KVM_PERMILLE_MMU_PAGES 20
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#define KVM_MIN_ALLOC_MMU_PAGES 64
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#define KVM_NUM_MMU_PAGES 1024
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#define KVM_MIN_FREE_MMU_PAGES 5
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#define KVM_REFILL_PAGES 25
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#define KVM_MAX_CPUID_ENTRIES 40
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extern spinlock_t kvm_lock;
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extern struct list_head vm_list;
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struct kvm_vcpu;
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struct kvm;
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enum {
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VCPU_REGS_RAX = 0,
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VCPU_REGS_RCX = 1,
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@ -92,6 +102,89 @@ enum {
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#include "x86_emulate.h"
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#define KVM_NR_MEM_OBJS 40
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/*
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* We don't want allocation failures within the mmu code, so we preallocate
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* enough memory for a single page fault in a cache.
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*/
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struct kvm_mmu_memory_cache {
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int nobjs;
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void *objects[KVM_NR_MEM_OBJS];
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};
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#define NR_PTE_CHAIN_ENTRIES 5
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struct kvm_pte_chain {
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u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
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struct hlist_node link;
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};
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/*
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* kvm_mmu_page_role, below, is defined as:
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*
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* bits 0:3 - total guest paging levels (2-4, or zero for real mode)
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* bits 4:7 - page table level for this shadow (1-4)
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* bits 8:9 - page table quadrant for 2-level guests
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* bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode)
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* bits 17:19 - common access permissions for all ptes in this shadow page
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*/
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union kvm_mmu_page_role {
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unsigned word;
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struct {
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unsigned glevels : 4;
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unsigned level : 4;
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unsigned quadrant : 2;
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unsigned pad_for_nice_hex_output : 6;
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unsigned metaphysical : 1;
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unsigned access : 3;
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};
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};
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struct kvm_mmu_page {
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struct list_head link;
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struct hlist_node hash_link;
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/*
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* The following two entries are used to key the shadow page in the
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* hash table.
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*/
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gfn_t gfn;
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union kvm_mmu_page_role role;
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u64 *spt;
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/* hold the gfn of each spte inside spt */
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gfn_t *gfns;
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unsigned long slot_bitmap; /* One bit set per slot which has memory
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* in this shadow page.
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*/
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int multimapped; /* More than one parent_pte? */
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int root_count; /* Currently serving as active root */
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union {
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u64 *parent_pte; /* !multimapped */
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struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
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};
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};
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/*
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* x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
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* 32-bit). The kvm_mmu structure abstracts the details of the current mmu
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* mode.
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*/
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struct kvm_mmu {
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void (*new_cr3)(struct kvm_vcpu *vcpu);
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int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
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void (*free)(struct kvm_vcpu *vcpu);
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gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
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void (*prefetch_page)(struct kvm_vcpu *vcpu,
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struct kvm_mmu_page *page);
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hpa_t root_hpa;
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int root_level;
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int shadow_root_level;
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u64 *pae_root;
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};
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struct kvm_vcpu_arch {
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u64 host_tsc;
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int interrupt_window_open;
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@ -162,11 +255,6 @@ struct kvm_vcpu_arch {
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struct x86_emulate_ctxt emulate_ctxt;
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};
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struct kvm_vcpu {
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KVM_VCPU_COMM;
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struct kvm_vcpu_arch arch;
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};
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struct descriptor_table {
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u16 limit;
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