i2c: Add FSI-attached I2C master algorithm
Add register definitions for FSI-attached I2C master and functions to access those registers over FSI. Add an FSI driver so that our I2C bus is probed up during an FSI scan. Signed-off-by: Eddie James <eajames@linux.vnet.ibm.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Tested-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
This commit is contained in:
Eddie James
Wolfram Sang
Родитель
82d41d0974
Коммит
d6ffb63001
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@ -1327,4 +1327,15 @@ config I2C_ZX2967
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This driver can also be built as a module. If so, the module will be
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called i2c-zx2967.
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config I2C_FSI
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tristate "FSI I2C driver"
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depends on FSI
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help
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Driver for FSI bus attached I2C masters. These are I2C masters that
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are connected to the system over an FSI bus, instead of the more
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common PCI or MMIO interface.
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This driver can also be built as a module. If so, the module will be
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called as i2c-fsi.
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endmenu
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@ -137,5 +137,6 @@ obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o
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obj-$(CONFIG_I2C_SIBYTE) += i2c-sibyte.o
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obj-$(CONFIG_I2C_XGENE_SLIMPRO) += i2c-xgene-slimpro.o
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obj-$(CONFIG_SCx200_ACB) += scx200_acb.o
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obj-$(CONFIG_I2C_FSI) += i2c-fsi.o
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ccflags-$(CONFIG_I2C_DEBUG_BUS) := -DDEBUG
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@ -0,0 +1,239 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* FSI-attached I2C master algorithm
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*
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* Copyright 2018 IBM Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/bitfield.h>
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#include <linux/bitops.h>
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#include <linux/device.h>
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#include <linux/errno.h>
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#include <linux/fsi.h>
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#include <linux/i2c.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#define FSI_ENGID_I2C 0x7
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#define I2C_DEFAULT_CLK_DIV 6
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/* i2c registers */
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#define I2C_FSI_FIFO 0x00
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#define I2C_FSI_CMD 0x04
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#define I2C_FSI_MODE 0x08
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#define I2C_FSI_WATER_MARK 0x0C
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#define I2C_FSI_INT_MASK 0x10
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#define I2C_FSI_INT_COND 0x14
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#define I2C_FSI_OR_INT_MASK 0x14
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#define I2C_FSI_INTS 0x18
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#define I2C_FSI_AND_INT_MASK 0x18
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#define I2C_FSI_STAT 0x1C
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#define I2C_FSI_RESET_I2C 0x1C
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#define I2C_FSI_ESTAT 0x20
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#define I2C_FSI_RESET_ERR 0x20
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#define I2C_FSI_RESID_LEN 0x24
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#define I2C_FSI_SET_SCL 0x24
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#define I2C_FSI_PORT_BUSY 0x28
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#define I2C_FSI_RESET_SCL 0x2C
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#define I2C_FSI_SET_SDA 0x30
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#define I2C_FSI_RESET_SDA 0x34
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/* cmd register */
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#define I2C_CMD_WITH_START BIT(31)
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#define I2C_CMD_WITH_ADDR BIT(30)
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#define I2C_CMD_RD_CONT BIT(29)
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#define I2C_CMD_WITH_STOP BIT(28)
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#define I2C_CMD_FORCELAUNCH BIT(27)
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#define I2C_CMD_ADDR GENMASK(23, 17)
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#define I2C_CMD_READ BIT(16)
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#define I2C_CMD_LEN GENMASK(15, 0)
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/* mode register */
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#define I2C_MODE_CLKDIV GENMASK(31, 16)
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#define I2C_MODE_PORT GENMASK(15, 10)
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#define I2C_MODE_ENHANCED BIT(3)
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#define I2C_MODE_DIAG BIT(2)
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#define I2C_MODE_PACE_ALLOW BIT(1)
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#define I2C_MODE_WRAP BIT(0)
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/* watermark register */
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#define I2C_WATERMARK_HI GENMASK(15, 12)
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#define I2C_WATERMARK_LO GENMASK(7, 4)
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#define I2C_FIFO_HI_LVL 4
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#define I2C_FIFO_LO_LVL 4
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/* interrupt register */
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#define I2C_INT_INV_CMD BIT(15)
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#define I2C_INT_PARITY BIT(14)
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#define I2C_INT_BE_OVERRUN BIT(13)
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#define I2C_INT_BE_ACCESS BIT(12)
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#define I2C_INT_LOST_ARB BIT(11)
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#define I2C_INT_NACK BIT(10)
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#define I2C_INT_DAT_REQ BIT(9)
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#define I2C_INT_CMD_COMP BIT(8)
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#define I2C_INT_STOP_ERR BIT(7)
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#define I2C_INT_BUSY BIT(6)
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#define I2C_INT_IDLE BIT(5)
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/* status register */
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#define I2C_STAT_INV_CMD BIT(31)
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#define I2C_STAT_PARITY BIT(30)
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#define I2C_STAT_BE_OVERRUN BIT(29)
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#define I2C_STAT_BE_ACCESS BIT(28)
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#define I2C_STAT_LOST_ARB BIT(27)
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#define I2C_STAT_NACK BIT(26)
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#define I2C_STAT_DAT_REQ BIT(25)
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#define I2C_STAT_CMD_COMP BIT(24)
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#define I2C_STAT_STOP_ERR BIT(23)
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#define I2C_STAT_MAX_PORT GENMASK(19, 16)
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#define I2C_STAT_ANY_INT BIT(15)
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#define I2C_STAT_SCL_IN BIT(11)
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#define I2C_STAT_SDA_IN BIT(10)
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#define I2C_STAT_PORT_BUSY BIT(9)
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#define I2C_STAT_SELF_BUSY BIT(8)
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#define I2C_STAT_FIFO_COUNT GENMASK(7, 0)
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#define I2C_STAT_ERR (I2C_STAT_INV_CMD | \
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I2C_STAT_PARITY | \
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I2C_STAT_BE_OVERRUN | \
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I2C_STAT_BE_ACCESS | \
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I2C_STAT_LOST_ARB | \
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I2C_STAT_NACK | \
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I2C_STAT_STOP_ERR)
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#define I2C_STAT_ANY_RESP (I2C_STAT_ERR | \
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I2C_STAT_DAT_REQ | \
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I2C_STAT_CMD_COMP)
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/* extended status register */
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#define I2C_ESTAT_FIFO_SZ GENMASK(31, 24)
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#define I2C_ESTAT_SCL_IN_SY BIT(15)
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#define I2C_ESTAT_SDA_IN_SY BIT(14)
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#define I2C_ESTAT_S_SCL BIT(13)
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#define I2C_ESTAT_S_SDA BIT(12)
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#define I2C_ESTAT_M_SCL BIT(11)
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#define I2C_ESTAT_M_SDA BIT(10)
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#define I2C_ESTAT_HI_WATER BIT(9)
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#define I2C_ESTAT_LO_WATER BIT(8)
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#define I2C_ESTAT_PORT_BUSY BIT(7)
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#define I2C_ESTAT_SELF_BUSY BIT(6)
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#define I2C_ESTAT_VERSION GENMASK(4, 0)
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struct fsi_i2c_master {
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struct fsi_device *fsi;
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u8 fifo_size;
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};
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static int fsi_i2c_read_reg(struct fsi_device *fsi, unsigned int reg,
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u32 *data)
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{
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int rc;
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__be32 data_be;
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rc = fsi_device_read(fsi, reg, &data_be, sizeof(data_be));
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if (rc)
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return rc;
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*data = be32_to_cpu(data_be);
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return 0;
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}
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static int fsi_i2c_write_reg(struct fsi_device *fsi, unsigned int reg,
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u32 *data)
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{
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__be32 data_be = cpu_to_be32p(data);
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return fsi_device_write(fsi, reg, &data_be, sizeof(data_be));
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}
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static int fsi_i2c_dev_init(struct fsi_i2c_master *i2c)
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{
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int rc;
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u32 mode = I2C_MODE_ENHANCED, extended_status, watermark;
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u32 interrupt = 0;
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/* since we use polling, disable interrupts */
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rc = fsi_i2c_write_reg(i2c->fsi, I2C_FSI_INT_MASK, &interrupt);
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if (rc)
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return rc;
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mode |= FIELD_PREP(I2C_MODE_CLKDIV, I2C_DEFAULT_CLK_DIV);
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rc = fsi_i2c_write_reg(i2c->fsi, I2C_FSI_MODE, &mode);
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if (rc)
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return rc;
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rc = fsi_i2c_read_reg(i2c->fsi, I2C_FSI_ESTAT, &extended_status);
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if (rc)
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return rc;
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i2c->fifo_size = FIELD_GET(I2C_ESTAT_FIFO_SZ, extended_status);
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watermark = FIELD_PREP(I2C_WATERMARK_HI,
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i2c->fifo_size - I2C_FIFO_HI_LVL);
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watermark |= FIELD_PREP(I2C_WATERMARK_LO, I2C_FIFO_LO_LVL);
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return fsi_i2c_write_reg(i2c->fsi, I2C_FSI_WATER_MARK, &watermark);
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}
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static int fsi_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
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int num)
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{
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return -EOPNOTSUPP;
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}
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static u32 fsi_i2c_functionality(struct i2c_adapter *adap)
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{
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return I2C_FUNC_I2C | I2C_FUNC_PROTOCOL_MANGLING |
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I2C_FUNC_SMBUS_EMUL | I2C_FUNC_SMBUS_BLOCK_DATA;
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}
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static const struct i2c_algorithm fsi_i2c_algorithm = {
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.master_xfer = fsi_i2c_xfer,
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.functionality = fsi_i2c_functionality,
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};
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static int fsi_i2c_probe(struct device *dev)
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{
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struct fsi_i2c_master *i2c;
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int rc;
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i2c = devm_kzalloc(dev, sizeof(*i2c), GFP_KERNEL);
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if (!i2c)
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return -ENOMEM;
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i2c->fsi = to_fsi_dev(dev);
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rc = fsi_i2c_dev_init(i2c);
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if (rc)
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return rc;
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dev_set_drvdata(dev, i2c);
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return 0;
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}
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static const struct fsi_device_id fsi_i2c_ids[] = {
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{ FSI_ENGID_I2C, FSI_VERSION_ANY },
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{ }
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};
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static struct fsi_driver fsi_i2c_driver = {
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.id_table = fsi_i2c_ids,
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.drv = {
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.name = "i2c-fsi",
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.bus = &fsi_bus_type,
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.probe = fsi_i2c_probe,
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},
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};
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module_fsi_driver(fsi_i2c_driver);
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MODULE_AUTHOR("Eddie James <eajames@us.ibm.com>");
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MODULE_DESCRIPTION("FSI attached I2C master");
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MODULE_LICENSE("GPL");
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