Pull mwait into test branch
This commit is contained in:
Коммит
d7321ad293
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@ -10,6 +10,7 @@
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/acpi.h>
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#include <linux/cpu.h>
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#include <acpi/processor.h>
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#include <asm/acpi.h>
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@ -41,5 +42,124 @@ void acpi_processor_power_init_bm_check(struct acpi_processor_flags *flags,
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flags->bm_check = 1;
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}
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}
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EXPORT_SYMBOL(acpi_processor_power_init_bm_check);
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/* The code below handles cstate entry with monitor-mwait pair on Intel*/
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struct cstate_entry_s {
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struct {
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unsigned int eax;
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unsigned int ecx;
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} states[ACPI_PROCESSOR_MAX_POWER];
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};
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static struct cstate_entry_s *cpu_cstate_entry; /* per CPU ptr */
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static short mwait_supported[ACPI_PROCESSOR_MAX_POWER];
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#define MWAIT_SUBSTATE_MASK (0xf)
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#define MWAIT_SUBSTATE_SIZE (4)
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#define CPUID_MWAIT_LEAF (5)
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#define CPUID5_ECX_EXTENSIONS_SUPPORTED (0x1)
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#define CPUID5_ECX_INTERRUPT_BREAK (0x2)
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#define MWAIT_ECX_INTERRUPT_BREAK (0x1)
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#define NATIVE_CSTATE_BEYOND_HALT (2)
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int acpi_processor_ffh_cstate_probe(unsigned int cpu,
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struct acpi_processor_cx *cx, struct acpi_power_register *reg)
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{
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struct cstate_entry_s *percpu_entry;
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struct cpuinfo_x86 *c = cpu_data + cpu;
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cpumask_t saved_mask;
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int retval;
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unsigned int eax, ebx, ecx, edx;
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unsigned int edx_part;
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unsigned int cstate_type; /* C-state type and not ACPI C-state type */
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unsigned int num_cstate_subtype;
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if (!cpu_cstate_entry || c->cpuid_level < CPUID_MWAIT_LEAF )
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return -1;
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if (reg->bit_offset != NATIVE_CSTATE_BEYOND_HALT)
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return -1;
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percpu_entry = per_cpu_ptr(cpu_cstate_entry, cpu);
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percpu_entry->states[cx->index].eax = 0;
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percpu_entry->states[cx->index].ecx = 0;
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/* Make sure we are running on right CPU */
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saved_mask = current->cpus_allowed;
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retval = set_cpus_allowed(current, cpumask_of_cpu(cpu));
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if (retval)
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return -1;
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cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &edx);
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/* Check whether this particular cx_type (in CST) is supported or not */
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cstate_type = (cx->address >> MWAIT_SUBSTATE_SIZE) + 1;
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edx_part = edx >> (cstate_type * MWAIT_SUBSTATE_SIZE);
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num_cstate_subtype = edx_part & MWAIT_SUBSTATE_MASK;
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retval = 0;
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if (num_cstate_subtype < (cx->address & MWAIT_SUBSTATE_MASK)) {
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retval = -1;
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goto out;
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}
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/* mwait ecx extensions INTERRUPT_BREAK should be supported for C2/C3 */
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if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) ||
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!(ecx & CPUID5_ECX_INTERRUPT_BREAK)) {
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retval = -1;
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goto out;
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}
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percpu_entry->states[cx->index].ecx = MWAIT_ECX_INTERRUPT_BREAK;
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/* Use the hint in CST */
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percpu_entry->states[cx->index].eax = cx->address;
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if (!mwait_supported[cstate_type]) {
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mwait_supported[cstate_type] = 1;
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printk(KERN_DEBUG "Monitor-Mwait will be used to enter C-%d "
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"state\n", cx->type);
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}
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out:
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set_cpus_allowed(current, saved_mask);
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return retval;
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}
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EXPORT_SYMBOL_GPL(acpi_processor_ffh_cstate_probe);
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void acpi_processor_ffh_cstate_enter(struct acpi_processor_cx *cx)
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{
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unsigned int cpu = smp_processor_id();
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struct cstate_entry_s *percpu_entry;
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percpu_entry = per_cpu_ptr(cpu_cstate_entry, cpu);
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mwait_idle_with_hints(percpu_entry->states[cx->index].eax,
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percpu_entry->states[cx->index].ecx);
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}
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EXPORT_SYMBOL_GPL(acpi_processor_ffh_cstate_enter);
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static int __init ffh_cstate_init(void)
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{
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struct cpuinfo_x86 *c = &boot_cpu_data;
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if (c->x86_vendor != X86_VENDOR_INTEL)
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return -1;
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cpu_cstate_entry = alloc_percpu(struct cstate_entry_s);
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return 0;
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}
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static void __exit ffh_cstate_exit(void)
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{
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if (cpu_cstate_entry) {
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free_percpu(cpu_cstate_entry);
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cpu_cstate_entry = NULL;
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}
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}
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arch_initcall(ffh_cstate_init);
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__exitcall(ffh_cstate_exit);
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@ -236,18 +236,26 @@ EXPORT_SYMBOL_GPL(cpu_idle_wait);
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* We execute MONITOR against need_resched and enter optimized wait state
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* through MWAIT. Whenever someone changes need_resched, we would be woken
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* up from MWAIT (without an IPI).
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*
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* New with Core Duo processors, MWAIT can take some hints based on CPU
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* capability.
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*/
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void mwait_idle_with_hints(unsigned long eax, unsigned long ecx)
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{
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if (!need_resched()) {
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__monitor((void *)¤t_thread_info()->flags, 0, 0);
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smp_mb();
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if (!need_resched())
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__mwait(eax, ecx);
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}
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}
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/* Default MONITOR/MWAIT with no hints, used for default C1 state */
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static void mwait_idle(void)
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{
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local_irq_enable();
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while (!need_resched()) {
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__monitor((void *)¤t_thread_info()->flags, 0, 0);
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smp_mb();
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if (need_resched())
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break;
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__mwait(0, 0);
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}
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while (!need_resched())
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mwait_idle_with_hints(0, 0);
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}
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void __devinit select_idle_routine(const struct cpuinfo_x86 *c)
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@ -238,18 +238,26 @@ void cpu_idle (void)
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* We execute MONITOR against need_resched and enter optimized wait state
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* through MWAIT. Whenever someone changes need_resched, we would be woken
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* up from MWAIT (without an IPI).
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*
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* New with Core Duo processors, MWAIT can take some hints based on CPU
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* capability.
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*/
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void mwait_idle_with_hints(unsigned long eax, unsigned long ecx)
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{
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if (!need_resched()) {
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__monitor((void *)¤t_thread_info()->flags, 0, 0);
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smp_mb();
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if (!need_resched())
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__mwait(eax, ecx);
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}
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}
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/* Default MONITOR/MWAIT with no hints, used for default C1 state */
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static void mwait_idle(void)
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{
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local_irq_enable();
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while (!need_resched()) {
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__monitor((void *)¤t_thread_info()->flags, 0, 0);
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smp_mb();
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if (need_resched())
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break;
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__mwait(0, 0);
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}
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while (!need_resched())
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mwait_idle_with_hints(0,0);
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}
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void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
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@ -219,6 +219,23 @@ static void acpi_safe_halt(void)
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static atomic_t c3_cpu_count;
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/* Common C-state entry for C2, C3, .. */
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static void acpi_cstate_enter(struct acpi_processor_cx *cstate)
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{
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if (cstate->space_id == ACPI_CSTATE_FFH) {
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/* Call into architectural FFH based C-state */
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acpi_processor_ffh_cstate_enter(cstate);
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} else {
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int unused;
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/* IO port based C-state */
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inb(cstate->address);
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/* Dummy wait op - must do something useless after P_LVL2 read
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because chipsets cannot guarantee that STPCLK# signal
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gets asserted in time to freeze execution properly. */
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unused = inl(acpi_fadt.xpm_tmr_blk.address);
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}
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}
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static void acpi_processor_idle(void)
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{
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struct acpi_processor *pr = NULL;
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@ -361,11 +378,7 @@ static void acpi_processor_idle(void)
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/* Get start time (ticks) */
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t1 = inl(acpi_fadt.xpm_tmr_blk.address);
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/* Invoke C2 */
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inb(cx->address);
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/* Dummy wait op - must do something useless after P_LVL2 read
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because chipsets cannot guarantee that STPCLK# signal
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gets asserted in time to freeze execution properly. */
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t2 = inl(acpi_fadt.xpm_tmr_blk.address);
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acpi_cstate_enter(cx);
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/* Get end time (ticks) */
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t2 = inl(acpi_fadt.xpm_tmr_blk.address);
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@ -401,9 +414,7 @@ static void acpi_processor_idle(void)
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/* Get start time (ticks) */
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t1 = inl(acpi_fadt.xpm_tmr_blk.address);
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/* Invoke C3 */
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inb(cx->address);
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/* Dummy wait op (see above) */
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t2 = inl(acpi_fadt.xpm_tmr_blk.address);
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acpi_cstate_enter(cx);
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/* Get end time (ticks) */
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t2 = inl(acpi_fadt.xpm_tmr_blk.address);
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if (pr->flags.bm_check) {
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@ -628,20 +639,16 @@ static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
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return 0;
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}
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static int acpi_processor_get_power_info_default_c1(struct acpi_processor *pr)
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static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
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{
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/* Zero initialize all the C-states info. */
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memset(pr->power.states, 0, sizeof(pr->power.states));
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/* set the first C-State to C1 */
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pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
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/* the C0 state only exists as a filler in our array,
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* and all processors need to support C1 */
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if (!pr->power.states[ACPI_STATE_C1].valid) {
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/* set the first C-State to C1 */
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/* all processors need to support C1 */
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pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
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pr->power.states[ACPI_STATE_C1].valid = 1;
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}
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/* the C0 state only exists as a filler in our array */
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pr->power.states[ACPI_STATE_C0].valid = 1;
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pr->power.states[ACPI_STATE_C1].valid = 1;
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return 0;
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}
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@ -658,12 +665,7 @@ static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
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if (nocst)
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return -ENODEV;
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current_count = 1;
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/* Zero initialize C2 onwards and prepare for fresh CST lookup */
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for (i = 2; i < ACPI_PROCESSOR_MAX_POWER; i++)
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memset(&(pr->power.states[i]), 0,
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sizeof(struct acpi_processor_cx));
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current_count = 0;
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status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
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if (ACPI_FAILURE(status)) {
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@ -718,22 +720,39 @@ static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
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(reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
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continue;
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cx.address = (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) ?
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0 : reg->address;
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/* There should be an easy way to extract an integer... */
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obj = (union acpi_object *)&(element->package.elements[1]);
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if (obj->type != ACPI_TYPE_INTEGER)
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continue;
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cx.type = obj->integer.value;
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/*
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* Some buggy BIOSes won't list C1 in _CST -
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* Let acpi_processor_get_power_info_default() handle them later
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*/
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if (i == 1 && cx.type != ACPI_STATE_C1)
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current_count++;
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if ((cx.type != ACPI_STATE_C1) &&
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(reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO))
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continue;
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cx.address = reg->address;
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cx.index = current_count + 1;
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if ((cx.type < ACPI_STATE_C2) || (cx.type > ACPI_STATE_C3))
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continue;
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cx.space_id = ACPI_CSTATE_SYSTEMIO;
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if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
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if (acpi_processor_ffh_cstate_probe
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(pr->id, &cx, reg) == 0) {
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cx.space_id = ACPI_CSTATE_FFH;
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} else if (cx.type != ACPI_STATE_C1) {
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/*
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* C1 is a special case where FIXED_HARDWARE
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* can be handled in non-MWAIT way as well.
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* In that case, save this _CST entry info.
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* That is, we retain space_id of SYSTEM_IO for
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* halt based C1.
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* Otherwise, ignore this info and continue.
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*/
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continue;
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}
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}
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obj = (union acpi_object *)&(element->package.elements[2]);
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if (obj->type != ACPI_TYPE_INTEGER)
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|
@ -938,12 +957,18 @@ static int acpi_processor_get_power_info(struct acpi_processor *pr)
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/* NOTE: the idle thread may not be running while calling
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* this function */
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/* Adding C1 state */
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acpi_processor_get_power_info_default_c1(pr);
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/* Zero initialize all the C-states info. */
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memset(pr->power.states, 0, sizeof(pr->power.states));
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result = acpi_processor_get_power_info_cst(pr);
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if (result == -ENODEV)
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acpi_processor_get_power_info_fadt(pr);
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if (result)
|
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return result;
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acpi_processor_get_power_info_default(pr);
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pr->power.count = acpi_processor_power_verify(pr);
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/*
|
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|
|
|
@ -13,6 +13,7 @@
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#define ACPI_PDC_SMP_C_SWCOORD (0x0040)
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#define ACPI_PDC_SMP_T_SWCOORD (0x0080)
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#define ACPI_PDC_C_C1_FFH (0x0100)
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#define ACPI_PDC_C_C2C3_FFH (0x0200)
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#define ACPI_PDC_EST_CAPABILITY_SMP (ACPI_PDC_SMP_C1PT | \
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ACPI_PDC_C_C1_HALT | \
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|
@ -23,8 +24,10 @@
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ACPI_PDC_SMP_P_SWCOORD | \
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ACPI_PDC_P_FFH)
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#define ACPI_PDC_C_CAPABILITY_SMP (ACPI_PDC_SMP_C2C3 | \
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ACPI_PDC_SMP_C1PT | \
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ACPI_PDC_C_C1_HALT)
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#define ACPI_PDC_C_CAPABILITY_SMP (ACPI_PDC_SMP_C2C3 | \
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ACPI_PDC_SMP_C1PT | \
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ACPI_PDC_C_C1_HALT | \
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ACPI_PDC_C_C1_FFH | \
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ACPI_PDC_C_C2C3_FFH)
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#endif /* __PDC_INTEL_H__ */
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|
|
|
@ -29,6 +29,9 @@
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#define DOMAIN_COORD_TYPE_SW_ANY 0xfd
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#define DOMAIN_COORD_TYPE_HW_ALL 0xfe
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#define ACPI_CSTATE_SYSTEMIO (0)
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#define ACPI_CSTATE_FFH (1)
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/* Power Management */
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struct acpi_processor_cx;
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|
@ -58,6 +61,8 @@ struct acpi_processor_cx {
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u8 valid;
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u8 type;
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u32 address;
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u8 space_id;
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u8 index;
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u32 latency;
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u32 latency_ticks;
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u32 power;
|
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|
@ -206,6 +211,9 @@ void arch_acpi_processor_init_pdc(struct acpi_processor *pr);
|
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#ifdef ARCH_HAS_POWER_INIT
|
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void acpi_processor_power_init_bm_check(struct acpi_processor_flags *flags,
|
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unsigned int cpu);
|
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int acpi_processor_ffh_cstate_probe(unsigned int cpu,
|
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struct acpi_processor_cx *cx, struct acpi_power_register *reg);
|
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void acpi_processor_ffh_cstate_enter(struct acpi_processor_cx *cstate);
|
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#else
|
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static inline void acpi_processor_power_init_bm_check(struct
|
||||
acpi_processor_flags
|
||||
|
@ -214,6 +222,16 @@ static inline void acpi_processor_power_init_bm_check(struct
|
|||
flags->bm_check = 1;
|
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return;
|
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}
|
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static inline int acpi_processor_ffh_cstate_probe(unsigned int cpu,
|
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struct acpi_processor_cx *cx, struct acpi_power_register *reg)
|
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{
|
||||
return -1;
|
||||
}
|
||||
static inline void acpi_processor_ffh_cstate_enter(
|
||||
struct acpi_processor_cx *cstate)
|
||||
{
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* in processor_perflib.c */
|
||||
|
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@ -306,6 +306,8 @@ static inline void __mwait(unsigned long eax, unsigned long ecx)
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: :"a" (eax), "c" (ecx));
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}
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extern void mwait_idle_with_hints(unsigned long eax, unsigned long ecx);
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/* from system description table in BIOS. Mostly for MCA use, but
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others may find it useful. */
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extern unsigned int machine_id;
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|
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@ -475,6 +475,8 @@ static inline void __mwait(unsigned long eax, unsigned long ecx)
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: :"a" (eax), "c" (ecx));
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}
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extern void mwait_idle_with_hints(unsigned long eax, unsigned long ecx);
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#define stack_current() \
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({ \
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||||
struct thread_info *ti; \
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