avr: Cleanup genirq namespace
Scripted conversion to new function names with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
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250153361f
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d75f1bfdbc
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@ -301,7 +301,7 @@ static int __init mrmt1_init(void)
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/* Select the Touchscreen interrupt pin mode */
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at32_select_periph( GPIO_PIOB_BASE, 1 << (PB_EXTINT_BASE+TS_IRQ),
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GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
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set_irq_type( AT32_EXTINT(TS_IRQ), IRQ_TYPE_EDGE_FALLING );
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irq_set_irq_type(AT32_EXTINT(TS_IRQ), IRQ_TYPE_EDGE_FALLING);
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at32_spi_setup_slaves(0,spi01_board_info,ARRAY_SIZE(spi01_board_info));
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spi_register_board_info(spi01_board_info,ARRAY_SIZE(spi01_board_info));
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#endif
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@ -322,6 +322,6 @@ static int __init atngw100_arch_init(void)
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/* set_irq_type() after the arch_initcall for EIC has run, and
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* before the I2C subsystem could try using this IRQ.
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*/
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return set_irq_type(AT32_EXTINT(3), IRQ_TYPE_EDGE_FALLING);
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return irq_set_irq_type(AT32_EXTINT(3), IRQ_TYPE_EDGE_FALLING);
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}
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arch_initcall(atngw100_arch_init);
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@ -134,9 +134,9 @@ static int eic_set_irq_type(struct irq_chip *d, unsigned int flow_type)
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if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) {
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flow_type |= IRQ_LEVEL;
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__set_irq_handler_unlocked(irq, handle_level_irq);
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__irq_set_handler_locked(irq, handle_level_irq);
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} else
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__set_irq_handler_unlocked(irq, handle_edge_irq);
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__irq_set_handler_locked(irq, handle_edge_irq);
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desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
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desc->status |= flow_type;
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}
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@ -155,7 +155,7 @@ static struct irq_chip eic_chip = {
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static void demux_eic_irq(unsigned int irq, struct irq_desc *desc)
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{
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struct eic *eic = get_irq_desc_data(desc);
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struct eic *eic = irq_desc_get_handler_data(desc);
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unsigned long status, pending;
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unsigned int i;
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@ -235,13 +235,13 @@ static int __init eic_probe(struct platform_device *pdev)
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eic->chip = &eic_chip;
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for (i = 0; i < nr_of_irqs; i++) {
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set_irq_chip_and_handler(eic->first_irq + i, &eic_chip,
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irq_set_chip_and_handler(eic->first_irq + i, &eic_chip,
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handle_level_irq);
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set_irq_chip_data(eic->first_irq + i, eic);
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irq_set_chip_data(eic->first_irq + i, eic);
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}
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set_irq_chained_handler(int_irq, demux_eic_irq);
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set_irq_data(int_irq, eic);
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irq_set_chained_handler(int_irq, demux_eic_irq);
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irq_set_handler_data(int_irq, eic);
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if (pdev->id == 0) {
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nmi_eic = eic;
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@ -126,7 +126,7 @@ void __init init_IRQ(void)
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intc_writel(&intc0, INTPR0 + 4 * i, offset);
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readback = intc_readl(&intc0, INTPR0 + 4 * i);
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if (readback == offset)
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set_irq_chip_and_handler(i, &intc0.chip,
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irq_set_chip_and_handler(i, &intc0.chip,
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handle_simple_irq);
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}
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@ -285,7 +285,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
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struct pio_device *pio = get_irq_desc_chip_data(desc);
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unsigned gpio_irq;
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gpio_irq = (unsigned) get_irq_data(irq);
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gpio_irq = (unsigned) irq_get_handler_data(irq);
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for (;;) {
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u32 isr;
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@ -310,16 +310,16 @@ gpio_irq_setup(struct pio_device *pio, int irq, int gpio_irq)
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{
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unsigned i;
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set_irq_chip_data(irq, pio);
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set_irq_data(irq, (void *) gpio_irq);
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irq_set_chip_data(irq, pio);
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irq_set_handler_data(irq, (void *)gpio_irq);
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for (i = 0; i < 32; i++, gpio_irq++) {
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set_irq_chip_data(gpio_irq, pio);
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set_irq_chip_and_handler(gpio_irq, &gpio_irqchip,
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handle_simple_irq);
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irq_set_chip_data(gpio_irq, pio);
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irq_set_chip_and_handler(gpio_irq, &gpio_irqchip,
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handle_simple_irq);
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}
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set_irq_chained_handler(irq, gpio_irq_handler);
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irq_set_chained_handler(irq, gpio_irq_handler);
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}
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/*--------------------------------------------------------------------------*/
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