sata_dwc_460ex: fix most of the sparse warnings
There are a lot sparse warnings. Most of them related to __iomem keyword which sometimes absent when it's needed and vise versa. The patch fixes most of the warnings. While at it, remove the redundant sata_dwc_sht.can_queue initialization to ATA_DEF_QUEUE. tj: Added description about ATA_DEF_QUEUE init removal. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Tejun Heo <tj@kernel.org>
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84683a7e08
Коммит
d7c256e857
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@ -285,7 +285,7 @@ struct sata_dwc_device {
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struct device *dev; /* generic device struct */
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struct ata_probe_ent *pe; /* ptr to probe-ent */
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struct ata_host *host;
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u8 *reg_base;
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u8 __iomem *reg_base;
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struct sata_dwc_regs *sata_dwc_regs; /* DW Synopsys SATA specific */
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int irq_dma;
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};
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@ -335,7 +335,9 @@ struct sata_dwc_host_priv {
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struct device *dwc_dev;
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int dma_channel;
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};
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struct sata_dwc_host_priv host_pvt;
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static struct sata_dwc_host_priv host_pvt;
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/*
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* Prototypes
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*/
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@ -592,9 +594,9 @@ static int map_sg_to_lli(struct scatterlist *sg, int num_elems,
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sms_val = 0;
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dms_val = 1 + host_pvt.dma_channel;
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dev_dbg(host_pvt.dwc_dev, "%s: sg=%p nelem=%d lli=%p dma_lli=0x%08x"
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" dmadr=0x%08x\n", __func__, sg, num_elems, lli, (u32)dma_lli,
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(u32)dmadr_addr);
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dev_dbg(host_pvt.dwc_dev,
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"%s: sg=%p nelem=%d lli=%p dma_lli=0x%pad dmadr=0x%p\n",
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__func__, sg, num_elems, lli, &dma_lli, dmadr_addr);
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bl = get_burst_length_encode(AHB_DMA_BRST_DFLT);
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@ -785,7 +787,7 @@ static void dma_dwc_exit(struct sata_dwc_device *hsdev)
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{
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dev_dbg(host_pvt.dwc_dev, "%s:\n", __func__);
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if (host_pvt.sata_dma_regs) {
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iounmap(host_pvt.sata_dma_regs);
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iounmap((void __iomem *)host_pvt.sata_dma_regs);
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host_pvt.sata_dma_regs = NULL;
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}
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@ -830,7 +832,7 @@ static int sata_dwc_scr_read(struct ata_link *link, unsigned int scr, u32 *val)
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return -EINVAL;
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}
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*val = in_le32((void *)link->ap->ioaddr.scr_addr + (scr * 4));
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*val = in_le32(link->ap->ioaddr.scr_addr + (scr * 4));
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dev_dbg(link->ap->dev, "%s: id=%d reg=%d val=val=0x%08x\n",
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__func__, link->ap->print_id, scr, *val);
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@ -846,21 +848,19 @@ static int sata_dwc_scr_write(struct ata_link *link, unsigned int scr, u32 val)
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__func__, scr);
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return -EINVAL;
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}
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out_le32((void *)link->ap->ioaddr.scr_addr + (scr * 4), val);
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out_le32(link->ap->ioaddr.scr_addr + (scr * 4), val);
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return 0;
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}
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static u32 core_scr_read(unsigned int scr)
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{
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return in_le32((void __iomem *)(host_pvt.scr_addr_sstatus) +\
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(scr * 4));
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return in_le32(host_pvt.scr_addr_sstatus + (scr * 4));
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}
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static void core_scr_write(unsigned int scr, u32 val)
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{
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out_le32((void __iomem *)(host_pvt.scr_addr_sstatus) + (scr * 4),
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val);
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out_le32(host_pvt.scr_addr_sstatus + (scr * 4), val);
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}
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static void clear_serror(void)
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@ -868,7 +868,6 @@ static void clear_serror(void)
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u32 val;
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val = core_scr_read(SCR_ERROR);
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core_scr_write(SCR_ERROR, val);
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}
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static void clear_interrupt_bit(struct sata_dwc_device *hsdev, u32 bit)
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@ -1268,24 +1267,24 @@ static void sata_dwc_enable_interrupts(struct sata_dwc_device *hsdev)
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static void sata_dwc_setup_port(struct ata_ioports *port, unsigned long base)
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{
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port->cmd_addr = (void *)base + 0x00;
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port->data_addr = (void *)base + 0x00;
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port->cmd_addr = (void __iomem *)base + 0x00;
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port->data_addr = (void __iomem *)base + 0x00;
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port->error_addr = (void *)base + 0x04;
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port->feature_addr = (void *)base + 0x04;
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port->error_addr = (void __iomem *)base + 0x04;
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port->feature_addr = (void __iomem *)base + 0x04;
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port->nsect_addr = (void *)base + 0x08;
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port->nsect_addr = (void __iomem *)base + 0x08;
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port->lbal_addr = (void *)base + 0x0c;
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port->lbam_addr = (void *)base + 0x10;
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port->lbah_addr = (void *)base + 0x14;
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port->lbal_addr = (void __iomem *)base + 0x0c;
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port->lbam_addr = (void __iomem *)base + 0x10;
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port->lbah_addr = (void __iomem *)base + 0x14;
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port->device_addr = (void *)base + 0x18;
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port->command_addr = (void *)base + 0x1c;
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port->status_addr = (void *)base + 0x1c;
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port->device_addr = (void __iomem *)base + 0x18;
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port->command_addr = (void __iomem *)base + 0x1c;
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port->status_addr = (void __iomem *)base + 0x1c;
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port->altstatus_addr = (void *)base + 0x20;
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port->ctl_addr = (void *)base + 0x20;
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port->altstatus_addr = (void __iomem *)base + 0x20;
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port->ctl_addr = (void __iomem *)base + 0x20;
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}
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/*
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@ -1326,7 +1325,7 @@ static int sata_dwc_port_start(struct ata_port *ap)
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for (i = 0; i < SATA_DWC_QCMD_MAX; i++)
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hsdevp->cmd_issued[i] = SATA_DWC_CMD_ISSUED_NOT;
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ap->bmdma_prd = 0; /* set these so libata doesn't use them */
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ap->bmdma_prd = NULL; /* set these so libata doesn't use them */
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ap->bmdma_prd_dma = 0;
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/*
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@ -1523,8 +1522,8 @@ static void sata_dwc_qc_prep_by_tag(struct ata_queued_cmd *qc, u8 tag)
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dma_chan = dma_dwc_xfer_setup(sg, qc->n_elem, hsdevp->llit[tag],
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hsdevp->llit_dma[tag],
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(void *__iomem)(&hsdev->sata_dwc_regs->\
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dmadr), qc->dma_dir);
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(void __iomem *)&hsdev->sata_dwc_regs->dmadr,
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qc->dma_dir);
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if (dma_chan < 0) {
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dev_err(ap->dev, "%s: dma_dwc_xfer_setup returns err %d\n",
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__func__, dma_chan);
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@ -1597,8 +1596,8 @@ static void sata_dwc_error_handler(struct ata_port *ap)
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ata_sff_error_handler(ap);
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}
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int sata_dwc_hardreset(struct ata_link *link, unsigned int *class,
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unsigned long deadline)
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static int sata_dwc_hardreset(struct ata_link *link, unsigned int *class,
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unsigned long deadline)
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{
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struct sata_dwc_device *hsdev = HSDEV_FROM_AP(link->ap);
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int ret;
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@ -1630,7 +1629,7 @@ static struct scsi_host_template sata_dwc_sht = {
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* max of 1. This will get fixed in in a future release.
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*/
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.sg_tablesize = LIBATA_MAX_PRD,
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.can_queue = ATA_DEF_QUEUE, /* ATA_MAX_QUEUE */
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/* .can_queue = ATA_MAX_QUEUE, */
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.dma_boundary = ATA_DMA_BOUNDARY,
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};
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@ -1667,7 +1666,7 @@ static int sata_dwc_probe(struct platform_device *ofdev)
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struct sata_dwc_device *hsdev;
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u32 idr, versionr;
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char *ver = (char *)&versionr;
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u8 *base = NULL;
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u8 __iomem *base;
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int err = 0;
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int irq;
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struct ata_host *host;
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@ -1736,7 +1735,7 @@ static int sata_dwc_probe(struct platform_device *ofdev)
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}
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/* Get physical SATA DMA register base address */
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host_pvt.sata_dma_regs = of_iomap(ofdev->dev.of_node, 1);
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host_pvt.sata_dma_regs = (void *)of_iomap(ofdev->dev.of_node, 1);
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if (!(host_pvt.sata_dma_regs)) {
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dev_err(&ofdev->dev, "ioremap failed for AHBDMA register"
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" address\n");
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