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powerpc: change CONFIG_6xx to CONFIG_PPC_BOOK3S_32 

Today we have:

config PPC_BOOK3S_32
	bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
	[depends on PPC32 within a choice]

config PPC_BOOK3S
	def_bool y
	depends on PPC_BOOK3S_32 || PPC_BOOK3S_64

config 6xx
	def_bool y
	depends on PPC32 && PPC_BOOK3S

6xx is therefore redundant with PPC_BOOK3S_32.

In order to make the code clearer, lets use preferably PPC_BOOK3S_32.
This will allow to remove CONFIG_6xx in a later patch.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Christophe Leroy 2018-11-17 10:24:56 +00:00 коммит произвёл Michael Ellerman
Родитель f99e33f124
Коммит d7cceda96b
20 изменённых файлов: 33 добавлений и 33 удалений
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2
arch/powerpc/Makefile
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@ -241,7 +241,7 @@ KBUILD_CFLAGS += $(call cc-option,-fno-dwarf2-cfi-asm)
# often slow when they are implemented at all # often slow when they are implemented at all
KBUILD_CFLAGS += $(call cc-option,-mno-string) KBUILD_CFLAGS += $(call cc-option,-mno-string)
ifdef CONFIG_6xx ifdef CONFIG_PPC_BOOK3S_32
KBUILD_CFLAGS += -mcpu=powerpc KBUILD_CFLAGS += -mcpu=powerpc
endif endif

2
arch/powerpc/include/asm/cache.h
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@ -71,7 +71,7 @@ extern struct ppc64_caches ppc64_caches;
#else #else
#define __read_mostly __attribute__((__section__(".data..read_mostly"))) #define __read_mostly __attribute__((__section__(".data..read_mostly")))
#ifdef CONFIG_6xx #ifdef CONFIG_PPC_BOOK3S_32
extern long _get_L2CR(void); extern long _get_L2CR(void);
extern long _get_L3CR(void); extern long _get_L3CR(void);
extern void _set_L2CR(unsigned long); extern void _set_L2CR(unsigned long);

2
arch/powerpc/include/asm/mmu.h
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@ -48,7 +48,7 @@
#define MMU_FTR_USE_HIGH_BATS ASM_CONST(0x00010000) #define MMU_FTR_USE_HIGH_BATS ASM_CONST(0x00010000)
/* Enable >32-bit physical addresses on 32-bit processor, only used /* Enable >32-bit physical addresses on 32-bit processor, only used
* by CONFIG_6xx currently as BookE supports that from day 1 * by CONFIG_PPC_BOOK3S_32 currently as BookE supports that from day 1
*/ */
#define MMU_FTR_BIG_PHYS ASM_CONST(0x00020000) #define MMU_FTR_BIG_PHYS ASM_CONST(0x00020000)

2
arch/powerpc/include/asm/reg.h
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@ -582,7 +582,7 @@
#define HID0_POWER9_RADIX __MASK(63 - 8) #define HID0_POWER9_RADIX __MASK(63 - 8)
#define SPRN_HID1 0x3F1 /* Hardware Implementation Register 1 */ #define SPRN_HID1 0x3F1 /* Hardware Implementation Register 1 */
#ifdef CONFIG_6xx #ifdef CONFIG_PPC_BOOK3S_32
#define HID1_EMCP (1<<31) /* 7450 Machine Check Pin Enable */ #define HID1_EMCP (1<<31) /* 7450 Machine Check Pin Enable */
#define HID1_DFS (1<<22) /* 7447A Dynamic Frequency Scaling */ #define HID1_DFS (1<<22) /* 7447A Dynamic Frequency Scaling */
#define HID1_PC0 (1<<16) /* 7450 PLL_CFG[0] */ #define HID1_PC0 (1<<16) /* 7450 PLL_CFG[0] */

2
arch/powerpc/include/asm/time.h
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@ -43,7 +43,7 @@ struct div_result {
/* Accessor functions for the timebase (RTC on 601) registers. */ /* Accessor functions for the timebase (RTC on 601) registers. */
/* If one day CONFIG_POWER is added just define __USE_RTC as 1 */ /* If one day CONFIG_POWER is added just define __USE_RTC as 1 */
#ifdef CONFIG_6xx #ifdef CONFIG_PPC_BOOK3S_32
#define __USE_RTC() (cpu_has_feature(CPU_FTR_USE_RTC)) #define __USE_RTC() (cpu_has_feature(CPU_FTR_USE_RTC))
#else #else
#define __USE_RTC() 0 #define __USE_RTC() 0

2
arch/powerpc/kernel/Makefile
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@ -69,7 +69,7 @@ obj-$(CONFIG_FA_DUMP) += fadump.o
ifdef CONFIG_PPC32 ifdef CONFIG_PPC32
obj-$(CONFIG_E500) += idle_e500.o obj-$(CONFIG_E500) += idle_e500.o
endif endif
obj-$(CONFIG_6xx) += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o obj-$(CONFIG_PPC_BOOK3S_32) += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o
obj-$(CONFIG_TAU) += tau_6xx.o obj-$(CONFIG_TAU) += tau_6xx.o
obj-$(CONFIG_HIBERNATION) += swsusp.o suspend.o obj-$(CONFIG_HIBERNATION) += swsusp.o suspend.o
ifdef CONFIG_FSL_BOOKE ifdef CONFIG_FSL_BOOKE

2
arch/powerpc/kernel/cpu_setup_6xx.S
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@ -326,7 +326,7 @@ _GLOBAL(__save_cpu_setup)
lis r5,cpu_state_storage@h lis r5,cpu_state_storage@h
ori r5,r5,cpu_state_storage@l ori r5,r5,cpu_state_storage@l
/* Save HID0 (common to all CONFIG_6xx cpus) */ /* Save HID0 (common to all CONFIG_PPC_BOOK3S_32 cpus) */
mfspr r3,SPRN_HID0 mfspr r3,SPRN_HID0
stw r3,CS_HID0(r5) stw r3,CS_HID0(r5)

10
arch/powerpc/kernel/entry_32.S
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@ -200,14 +200,14 @@ transfer_to_handler:
cmplw r1,r9 /* if r1 <= ksp_limit */ cmplw r1,r9 /* if r1 <= ksp_limit */
ble- stack_ovf /* then the kernel stack overflowed */ ble- stack_ovf /* then the kernel stack overflowed */
5: 5:
#if defined(CONFIG_6xx) || defined(CONFIG_E500) #if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_E500)
CURRENT_THREAD_INFO(r9, r1) CURRENT_THREAD_INFO(r9, r1)
tophys(r9,r9) /* check local flags */ tophys(r9,r9) /* check local flags */
lwz r12,TI_LOCAL_FLAGS(r9) lwz r12,TI_LOCAL_FLAGS(r9)
mtcrf 0x01,r12 mtcrf 0x01,r12
bt- 31-TLF_NAPPING,4f bt- 31-TLF_NAPPING,4f
bt- 31-TLF_SLEEPING,7f bt- 31-TLF_SLEEPING,7f
#endif /* CONFIG_6xx || CONFIG_E500 */ #endif /* CONFIG_PPC_BOOK3S_32 || CONFIG_E500 */
.globl transfer_to_handler_cont .globl transfer_to_handler_cont
transfer_to_handler_cont: transfer_to_handler_cont:
3: 3:
@ -273,7 +273,7 @@ reenable_mmu: /* re-enable mmu so we can */
RFI /* jump to handler, enable MMU */ RFI /* jump to handler, enable MMU */
#endif /* CONFIG_TRACE_IRQFLAGS */ #endif /* CONFIG_TRACE_IRQFLAGS */
#if defined (CONFIG_6xx) || defined(CONFIG_E500) #if defined (CONFIG_PPC_BOOK3S_32) || defined(CONFIG_E500)
4: rlwinm r12,r12,0,~_TLF_NAPPING 4: rlwinm r12,r12,0,~_TLF_NAPPING
stw r12,TI_LOCAL_FLAGS(r9) stw r12,TI_LOCAL_FLAGS(r9)
b power_save_ppc32_restore b power_save_ppc32_restore
@ -612,7 +612,7 @@ ppc_swapcontext:
handle_page_fault: handle_page_fault:
stw r4,_DAR(r1) stw r4,_DAR(r1)
addi r3,r1,STACK_FRAME_OVERHEAD addi r3,r1,STACK_FRAME_OVERHEAD
#ifdef CONFIG_6xx #ifdef CONFIG_PPC_BOOK3S_32
andis. r0,r5,DSISR_DABRMATCH@h andis. r0,r5,DSISR_DABRMATCH@h
bne- handle_dabr_fault bne- handle_dabr_fault
#endif #endif
@ -629,7 +629,7 @@ handle_page_fault:
bl bad_page_fault bl bad_page_fault
b ret_from_except_full b ret_from_except_full
#ifdef CONFIG_6xx #ifdef CONFIG_PPC_BOOK3S_32
/* We have a data breakpoint exception - handle it */ /* We have a data breakpoint exception - handle it */
handle_dabr_fault: handle_dabr_fault:
SAVE_NVGPRS(r1) SAVE_NVGPRS(r1)

14
arch/powerpc/kernel/head_32.S
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@ -176,10 +176,10 @@ __after_mmu_off:
bl reloc_offset bl reloc_offset
li r24,0 /* cpu# */ li r24,0 /* cpu# */
bl call_setup_cpu /* Call setup_cpu for this CPU */ bl call_setup_cpu /* Call setup_cpu for this CPU */
#ifdef CONFIG_6xx #ifdef CONFIG_PPC_BOOK3S_32
bl reloc_offset bl reloc_offset
bl init_idle_6xx bl init_idle_6xx
#endif /* CONFIG_6xx */ #endif /* CONFIG_PPC_BOOK3S_32 */
/* /*
@ -836,10 +836,10 @@ __secondary_start:
lis r3,-KERNELBASE@h lis r3,-KERNELBASE@h
mr r4,r24 mr r4,r24
bl call_setup_cpu /* Call setup_cpu for this CPU */ bl call_setup_cpu /* Call setup_cpu for this CPU */
#ifdef CONFIG_6xx #ifdef CONFIG_PPC_BOOK3S_32
lis r3,-KERNELBASE@h lis r3,-KERNELBASE@h
bl init_idle_6xx bl init_idle_6xx
#endif /* CONFIG_6xx */ #endif /* CONFIG_PPC_BOOK3S_32 */
/* get current_thread_info and current */ /* get current_thread_info and current */
lis r1,secondary_ti@ha lis r1,secondary_ti@ha
@ -880,14 +880,14 @@ __secondary_start:
/* /*
* Those generic dummy functions are kept for CPUs not * Those generic dummy functions are kept for CPUs not
* included in CONFIG_6xx * included in CONFIG_PPC_BOOK3S_32
*/ */
#if !defined(CONFIG_6xx) #if !defined(CONFIG_PPC_BOOK3S_32)
_ENTRY(__save_cpu_setup) _ENTRY(__save_cpu_setup)
blr blr
_ENTRY(__restore_cpu_setup) _ENTRY(__restore_cpu_setup)
blr blr
#endif /* !defined(CONFIG_6xx) */ #endif /* !defined(CONFIG_PPC_BOOK3S_32) */
/* /*

4
arch/powerpc/kernel/misc_32.S
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@ -153,7 +153,7 @@ _GLOBAL(call_setup_cpu)
mtctr r5 mtctr r5
bctr bctr
#if defined(CONFIG_CPU_FREQ_PMAC) && defined(CONFIG_6xx) #if defined(CONFIG_CPU_FREQ_PMAC) && defined(CONFIG_PPC_BOOK3S_32)
/* This gets called by via-pmu.c to switch the PLL selection /* This gets called by via-pmu.c to switch the PLL selection
* on 750fx CPU. This function should really be moved to some * on 750fx CPU. This function should really be moved to some
@ -223,7 +223,7 @@ _GLOBAL(low_choose_7447a_dfs)
mtmsr r7 mtmsr r7
blr blr
#endif /* CONFIG_CPU_FREQ_PMAC && CONFIG_6xx */ #endif /* CONFIG_CPU_FREQ_PMAC && CONFIG_PPC_BOOK3S_32 */
/* /*
* complement mask on the msr then "or" some values on. * complement mask on the msr then "or" some values on.

2
arch/powerpc/kernel/pmc.c
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@ -29,7 +29,7 @@ static void dummy_perf(struct pt_regs *regs)
{ {
#if defined(CONFIG_FSL_EMB_PERFMON) #if defined(CONFIG_FSL_EMB_PERFMON)
mtpmr(PMRN_PMGC0, mfpmr(PMRN_PMGC0) & ~PMGC0_PMIE); mtpmr(PMRN_PMGC0, mfpmr(PMRN_PMGC0) & ~PMGC0_PMIE);
#elif defined(CONFIG_PPC64) || defined(CONFIG_6xx) #elif defined(CONFIG_PPC64) || defined(CONFIG_PPC_BOOK3S_32)
if (cur_cpu_spec->pmc_type == PPC_PMC_IBM) if (cur_cpu_spec->pmc_type == PPC_PMC_IBM)
mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~(MMCR0_PMXE|MMCR0_PMAO)); mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~(MMCR0_PMXE|MMCR0_PMAO));
#else #else

2
arch/powerpc/kernel/setup_32.c
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@ -240,7 +240,7 @@ void __init exc_lvl_early_init(void)
void __init setup_power_save(void) void __init setup_power_save(void)
{ {
#ifdef CONFIG_6xx #ifdef CONFIG_PPC_BOOK3S_32
if (cpu_has_feature(CPU_FTR_CAN_DOZE) || if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
cpu_has_feature(CPU_FTR_CAN_NAP)) cpu_has_feature(CPU_FTR_CAN_NAP))
ppc_md.power_save = ppc6xx_idle; ppc_md.power_save = ppc6xx_idle;

2
arch/powerpc/kernel/sysfs.c
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@ -457,7 +457,7 @@ static ssize_t __used \
#define HAS_PPC_PMC_CLASSIC 1 #define HAS_PPC_PMC_CLASSIC 1
#define HAS_PPC_PMC_IBM 1 #define HAS_PPC_PMC_IBM 1
#define HAS_PPC_PMC_PA6T 1 #define HAS_PPC_PMC_PA6T 1
#elif defined(CONFIG_6xx) #elif defined(CONFIG_PPC_BOOK3S_32)
#define HAS_PPC_PMC_CLASSIC 1 #define HAS_PPC_PMC_CLASSIC 1
#define HAS_PPC_PMC_IBM 1 #define HAS_PPC_PMC_IBM 1
#define HAS_PPC_PMC_G4 1 #define HAS_PPC_PMC_G4 1

2
arch/powerpc/mm/mmu_decl.h
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@ -155,7 +155,7 @@ struct tlbcam {
}; };
#endif #endif
#if defined(CONFIG_6xx) || defined(CONFIG_FSL_BOOKE) || defined(CONFIG_PPC_8xx) #if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_FSL_BOOKE) || defined(CONFIG_PPC_8xx)
/* 6xx have BATS */ /* 6xx have BATS */
/* FSL_BOOKE have TLBCAM */ /* FSL_BOOKE have TLBCAM */
/* 8xx have LTLB */ /* 8xx have LTLB */

2
arch/powerpc/oprofile/Makefile
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@ -16,4 +16,4 @@ oprofile-$(CONFIG_OPROFILE_CELL) += op_model_cell.o \
cell/spu_task_sync.o cell/spu_task_sync.o
oprofile-$(CONFIG_PPC_BOOK3S_64) += op_model_power4.o op_model_pa6t.o oprofile-$(CONFIG_PPC_BOOK3S_64) += op_model_power4.o op_model_pa6t.o
oprofile-$(CONFIG_FSL_EMB_PERFMON) += op_model_fsl_emb.o oprofile-$(CONFIG_FSL_EMB_PERFMON) += op_model_fsl_emb.o
oprofile-$(CONFIG_6xx) += op_model_7450.o oprofile-$(CONFIG_PPC_BOOK3S_32) += op_model_7450.o

2
arch/powerpc/oprofile/common.c
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@ -212,7 +212,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
model = &op_model_pa6t; model = &op_model_pa6t;
break; break;
#endif #endif
#ifdef CONFIG_6xx #ifdef CONFIG_PPC_BOOK3S_32
case PPC_OPROFILE_G4: case PPC_OPROFILE_G4:
model = &op_model_7450; model = &op_model_7450;
break; break;

4
arch/powerpc/platforms/powermac/cache.S
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@ -28,7 +28,7 @@
*/ */
_GLOBAL(flush_disable_caches) _GLOBAL(flush_disable_caches)
#ifndef CONFIG_6xx #ifndef CONFIG_PPC_BOOK3S_32
blr blr
#else #else
BEGIN_FTR_SECTION BEGIN_FTR_SECTION
@ -356,4 +356,4 @@ END_FTR_SECTION_IFSET(CPU_FTR_L3CR)
mtmsr r11 /* restore DR and EE */ mtmsr r11 /* restore DR and EE */
isync isync
blr blr
#endif /* CONFIG_6xx */ #endif /* CONFIG_PPC_BOOK3S_32 */

2
arch/powerpc/platforms/powermac/feature.c
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@ -51,7 +51,7 @@
#define DBG(fmt...) #define DBG(fmt...)
#endif #endif
#ifdef CONFIG_6xx #ifdef CONFIG_PPC_BOOK3S_32
extern int powersave_lowspeed; extern int powersave_lowspeed;
#endif #endif

4
arch/powerpc/platforms/powermac/sleep.S
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@ -56,7 +56,7 @@
* vector that will be called by the ROM on wakeup * vector that will be called by the ROM on wakeup
*/ */
_GLOBAL(low_sleep_handler) _GLOBAL(low_sleep_handler)
#ifndef CONFIG_6xx #ifndef CONFIG_PPC_BOOK3S_32
blr blr
#else #else
mflr r0 mflr r0
@ -394,5 +394,5 @@ sleep_storage:
.long 0 .long 0
.balign L1_CACHE_BYTES, 0 .balign L1_CACHE_BYTES, 0
#endif /* CONFIG_6xx */ #endif /* CONFIG_PPC_BOOK3S_32 */
.section .text .section .text

2
arch/powerpc/sysdev/Makefile
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@ -48,7 +48,7 @@ obj-$(CONFIG_PPC_MPC512x) += mpc5xxx_clocks.o
obj-$(CONFIG_PPC_MPC52xx) += mpc5xxx_clocks.o obj-$(CONFIG_PPC_MPC52xx) += mpc5xxx_clocks.o
ifdef CONFIG_SUSPEND ifdef CONFIG_SUSPEND
obj-$(CONFIG_6xx) += 6xx-suspend.o obj-$(CONFIG_PPC_BOOK3S_32) += 6xx-suspend.o
endif endif
obj-$(CONFIG_PPC_SCOM) += scom.o obj-$(CONFIG_PPC_SCOM) += scom.o