[ARM] omap: convert OMAP1 to use clkdev
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Родитель
dbb674d57b
Коммит
d7e8f1f9d6
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@ -20,6 +20,7 @@
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#include <linux/io.h>
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#include <asm/mach-types.h>
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#include <asm/clkdev.h>
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#include <mach/cpu.h>
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#include <mach/usb.h>
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@ -32,6 +33,83 @@ static const struct clkops clkops_dspck;
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#include "clock.h"
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struct omap_clk {
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u32 cpu;
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struct clk_lookup lk;
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};
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#define CLK(dev, con, ck, cp) \
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{ \
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.cpu = cp, \
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.lk = { \
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.dev_id = dev, \
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.con_id = con, \
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.clk = ck, \
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}, \
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}
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#define CK_310 (1 << 0)
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#define CK_730 (1 << 1)
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#define CK_1510 (1 << 2)
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#define CK_16XX (1 << 3)
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static struct omap_clk omap_clks[] = {
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/* non-ULPD clocks */
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CLK(NULL, "ck_ref", &ck_ref, CK_16XX | CK_1510 | CK_310),
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CLK(NULL, "ck_dpll1", &ck_dpll1, CK_16XX | CK_1510 | CK_310),
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/* CK_GEN1 clocks */
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CLK(NULL, "ck_dpll1out", &ck_dpll1out.clk, CK_16XX),
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CLK(NULL, "ck_sossi", &sossi_ck, CK_16XX),
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CLK(NULL, "arm_ck", &arm_ck, CK_16XX | CK_1510 | CK_310),
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CLK(NULL, "armper_ck", &armper_ck.clk, CK_16XX | CK_1510 | CK_310),
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CLK(NULL, "arm_gpio_ck", &arm_gpio_ck, CK_1510 | CK_310),
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CLK(NULL, "armxor_ck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310),
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CLK(NULL, "armtim_ck", &armtim_ck.clk, CK_16XX | CK_1510 | CK_310),
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CLK(NULL, "armwdt_ck", &armwdt_ck.clk, CK_16XX | CK_1510 | CK_310),
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CLK(NULL, "arminth_ck", &arminth_ck1510, CK_1510 | CK_310),
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CLK(NULL, "arminth_ck", &arminth_ck16xx, CK_16XX),
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/* CK_GEN2 clocks */
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CLK(NULL, "dsp_ck", &dsp_ck, CK_16XX | CK_1510 | CK_310),
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CLK(NULL, "dspmmu_ck", &dspmmu_ck, CK_16XX | CK_1510 | CK_310),
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CLK(NULL, "dspper_ck", &dspper_ck, CK_16XX | CK_1510 | CK_310),
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CLK(NULL, "dspxor_ck", &dspxor_ck, CK_16XX | CK_1510 | CK_310),
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CLK(NULL, "dsptim_ck", &dsptim_ck, CK_16XX | CK_1510 | CK_310),
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/* CK_GEN3 clocks */
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CLK(NULL, "tc_ck", &tc_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_730),
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CLK(NULL, "tipb_ck", &tipb_ck, CK_1510 | CK_310),
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CLK(NULL, "l3_ocpi_ck", &l3_ocpi_ck, CK_16XX),
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CLK(NULL, "tc1_ck", &tc1_ck, CK_16XX),
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CLK(NULL, "tc2_ck", &tc2_ck, CK_16XX),
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CLK(NULL, "dma_ck", &dma_ck, CK_16XX | CK_1510 | CK_310),
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CLK(NULL, "dma_lcdfree_ck", &dma_lcdfree_ck, CK_16XX),
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CLK(NULL, "api_ck", &api_ck.clk, CK_16XX | CK_1510 | CK_310),
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CLK(NULL, "lb_ck", &lb_ck.clk, CK_1510 | CK_310),
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CLK(NULL, "rhea1_ck", &rhea1_ck, CK_16XX),
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CLK(NULL, "rhea2_ck", &rhea2_ck, CK_16XX),
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CLK(NULL, "lcd_ck", &lcd_ck_16xx, CK_16XX | CK_730),
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CLK(NULL, "lcd_ck", &lcd_ck_1510.clk, CK_1510 | CK_310),
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/* ULPD clocks */
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CLK(NULL, "uart1_ck", &uart1_1510, CK_1510 | CK_310),
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CLK(NULL, "uart1_ck", &uart1_16xx.clk, CK_16XX),
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CLK(NULL, "uart2_ck", &uart2_ck, CK_16XX | CK_1510 | CK_310),
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CLK(NULL, "uart3_ck", &uart3_1510, CK_1510 | CK_310),
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CLK(NULL, "uart3_ck", &uart3_16xx.clk, CK_16XX),
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CLK(NULL, "usb_clko", &usb_clko, CK_16XX | CK_1510 | CK_310),
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CLK(NULL, "usb_hhc_ck", &usb_hhc_ck1510, CK_1510 | CK_310),
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CLK(NULL, "usb_hhc_ck", &usb_hhc_ck16xx, CK_16XX),
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CLK(NULL, "usb_dc_ck", &usb_dc_ck, CK_16XX),
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CLK(NULL, "mclk", &mclk_1510, CK_1510 | CK_310),
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CLK(NULL, "mclk", &mclk_16xx, CK_16XX),
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CLK(NULL, "bclk", &bclk_1510, CK_1510 | CK_310),
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CLK(NULL, "bclk", &bclk_16xx, CK_16XX),
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CLK("mmci-omap.0", "mmc_ck", &mmc1_ck, CK_16XX | CK_1510 | CK_310),
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CLK("mmci-omap.1", "mmc_ck", &mmc2_ck, CK_16XX),
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/* Virtual clocks */
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CLK(NULL, "mpu", &virtual_ck_mpu, CK_16XX | CK_1510 | CK_310),
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CLK("i2c_omap.1", "i2c_fck", &i2c_fck, CK_16XX | CK_1510 | CK_310),
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CLK("i2c_omap.1", "i2c_ick", &i2c_ick, CK_16XX),
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};
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static int omap1_clk_enable_generic(struct clk * clk);
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static int omap1_clk_enable(struct clk *clk);
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static void omap1_clk_disable_generic(struct clk * clk);
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@ -677,10 +755,10 @@ static struct clk_functions omap1_clk_functions = {
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int __init omap1_clk_init(void)
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{
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struct clk ** clkp;
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struct omap_clk *c;
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const struct omap_clock_config *info;
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int crystal_type = 0; /* Default 12 MHz */
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u32 reg;
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u32 reg, cpu_mask;
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#ifdef CONFIG_DEBUG_LL
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/* Resets some clocks that may be left on from bootloader,
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@ -700,28 +778,22 @@ int __init omap1_clk_init(void)
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/* By default all idlect1 clocks are allowed to idle */
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arm_idlect1_mask = ~0;
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for (clkp = onchip_clks; clkp < onchip_clks+ARRAY_SIZE(onchip_clks); clkp++) {
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if (((*clkp)->flags &CLOCK_IN_OMAP1510) && cpu_is_omap1510()) {
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clk_register(*clkp);
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continue;
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}
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cpu_mask = 0;
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if (cpu_is_omap16xx())
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cpu_mask |= CK_16XX;
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if (cpu_is_omap1510())
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cpu_mask |= CK_1510;
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if (cpu_is_omap730())
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cpu_mask |= CK_730;
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if (cpu_is_omap310())
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cpu_mask |= CK_310;
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if (((*clkp)->flags &CLOCK_IN_OMAP16XX) && cpu_is_omap16xx()) {
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clk_register(*clkp);
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continue;
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for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++)
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if (c->cpu & cpu_mask) {
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clkdev_add(&c->lk);
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clk_register(c->lk.clk);
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}
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if (((*clkp)->flags &CLOCK_IN_OMAP730) && cpu_is_omap730()) {
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clk_register(*clkp);
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continue;
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}
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if (((*clkp)->flags &CLOCK_IN_OMAP310) && cpu_is_omap310()) {
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clk_register(*clkp);
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continue;
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}
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}
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info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config);
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if (info != NULL) {
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if (!cpu_is_omap15xx())
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@ -831,4 +903,3 @@ int __init omap1_clk_init(void)
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return 0;
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}
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@ -149,16 +149,13 @@ static struct clk ck_ref = {
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.name = "ck_ref",
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.ops = &clkops_null,
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.rate = 12000000,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
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CLOCK_IN_OMAP310,
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};
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static struct clk ck_dpll1 = {
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.name = "ck_dpll1",
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.ops = &clkops_null,
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.parent = &ck_ref,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
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CLOCK_IN_OMAP310 | RATE_PROPAGATES,
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.flags = RATE_PROPAGATES,
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};
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static struct arm_idlect1_clk ck_dpll1out = {
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@ -166,7 +163,7 @@ static struct arm_idlect1_clk ck_dpll1out = {
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.name = "ck_dpll1out",
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.ops = &clkops_generic,
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.parent = &ck_dpll1,
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.flags = CLOCK_IN_OMAP16XX | CLOCK_IDLE_CONTROL |
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.flags = CLOCK_IDLE_CONTROL |
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ENABLE_REG_32BIT | RATE_PROPAGATES,
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.enable_reg = (void __iomem *)ARM_IDLECT2,
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.enable_bit = EN_CKOUT_ARM,
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@ -179,8 +176,7 @@ static struct clk sossi_ck = {
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.name = "ck_sossi",
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.ops = &clkops_generic,
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.parent = &ck_dpll1out.clk,
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.flags = CLOCK_IN_OMAP16XX | CLOCK_NO_IDLE_PARENT |
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ENABLE_REG_32BIT,
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.flags = CLOCK_NO_IDLE_PARENT | ENABLE_REG_32BIT,
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.enable_reg = (void __iomem *)MOD_CONF_CTRL_1,
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.enable_bit = 16,
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.recalc = &omap1_sossi_recalc,
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@ -191,8 +187,7 @@ static struct clk arm_ck = {
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.name = "arm_ck",
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.ops = &clkops_null,
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.parent = &ck_dpll1,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
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CLOCK_IN_OMAP310 | RATE_PROPAGATES,
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.flags = RATE_PROPAGATES,
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.rate_offset = CKCTL_ARMDIV_OFFSET,
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.recalc = &omap1_ckctl_recalc,
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.round_rate = omap1_clk_round_rate_ckctl_arm,
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@ -204,8 +199,7 @@ static struct arm_idlect1_clk armper_ck = {
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.name = "armper_ck",
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.ops = &clkops_generic,
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.parent = &ck_dpll1,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
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CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL,
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.flags = CLOCK_IDLE_CONTROL,
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.enable_reg = (void __iomem *)ARM_IDLECT2,
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.enable_bit = EN_PERCK,
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.rate_offset = CKCTL_PERDIV_OFFSET,
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@ -220,7 +214,6 @@ static struct clk arm_gpio_ck = {
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.name = "arm_gpio_ck",
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.ops = &clkops_generic,
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.parent = &ck_dpll1,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
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.enable_reg = (void __iomem *)ARM_IDLECT2,
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.enable_bit = EN_GPIOCK,
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.recalc = &followparent_recalc,
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@ -231,8 +224,7 @@ static struct arm_idlect1_clk armxor_ck = {
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.name = "armxor_ck",
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.ops = &clkops_generic,
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.parent = &ck_ref,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
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CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL,
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.flags = CLOCK_IDLE_CONTROL,
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.enable_reg = (void __iomem *)ARM_IDLECT2,
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.enable_bit = EN_XORPCK,
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.recalc = &followparent_recalc,
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@ -245,8 +237,7 @@ static struct arm_idlect1_clk armtim_ck = {
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.name = "armtim_ck",
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.ops = &clkops_generic,
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.parent = &ck_ref,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
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CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL,
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.flags = CLOCK_IDLE_CONTROL,
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.enable_reg = (void __iomem *)ARM_IDLECT2,
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.enable_bit = EN_TIMCK,
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.recalc = &followparent_recalc,
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@ -259,8 +250,7 @@ static struct arm_idlect1_clk armwdt_ck = {
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.name = "armwdt_ck",
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.ops = &clkops_generic,
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.parent = &ck_ref,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
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CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL,
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.flags = CLOCK_IDLE_CONTROL,
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.enable_reg = (void __iomem *)ARM_IDLECT2,
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.enable_bit = EN_WDTCK,
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.recalc = &omap1_watchdog_recalc,
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@ -272,7 +262,6 @@ static struct clk arminth_ck16xx = {
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.name = "arminth_ck",
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.ops = &clkops_null,
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.parent = &arm_ck,
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.flags = CLOCK_IN_OMAP16XX,
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.recalc = &followparent_recalc,
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/* Note: On 16xx the frequency can be divided by 2 by programming
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* ARM_CKCTL:ARM_INTHCK_SEL(14) to 1
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@ -285,7 +274,6 @@ static struct clk dsp_ck = {
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.name = "dsp_ck",
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.ops = &clkops_generic,
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.parent = &ck_dpll1,
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.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
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.enable_reg = (void __iomem *)ARM_CKCTL,
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.enable_bit = EN_DSPCK,
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.rate_offset = CKCTL_DSPDIV_OFFSET,
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@ -298,7 +286,6 @@ static struct clk dspmmu_ck = {
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.name = "dspmmu_ck",
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.ops = &clkops_null,
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.parent = &ck_dpll1,
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.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
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.rate_offset = CKCTL_DSPMMUDIV_OFFSET,
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.recalc = &omap1_ckctl_recalc,
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.round_rate = omap1_clk_round_rate_ckctl_arm,
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@ -309,8 +296,7 @@ static struct clk dspper_ck = {
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.name = "dspper_ck",
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.ops = &clkops_dspck,
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.parent = &ck_dpll1,
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.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
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VIRTUAL_IO_ADDRESS,
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.flags = VIRTUAL_IO_ADDRESS,
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.enable_reg = DSP_IDLECT2,
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.enable_bit = EN_PERCK,
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.rate_offset = CKCTL_PERDIV_OFFSET,
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@ -323,8 +309,7 @@ static struct clk dspxor_ck = {
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.name = "dspxor_ck",
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.ops = &clkops_dspck,
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.parent = &ck_ref,
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.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
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VIRTUAL_IO_ADDRESS,
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.flags = VIRTUAL_IO_ADDRESS,
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.enable_reg = DSP_IDLECT2,
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.enable_bit = EN_XORPCK,
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.recalc = &followparent_recalc,
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@ -334,8 +319,7 @@ static struct clk dsptim_ck = {
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.name = "dsptim_ck",
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.ops = &clkops_dspck,
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.parent = &ck_ref,
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.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
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VIRTUAL_IO_ADDRESS,
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.flags = VIRTUAL_IO_ADDRESS,
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.enable_reg = DSP_IDLECT2,
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.enable_bit = EN_DSPTIMCK,
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.recalc = &followparent_recalc,
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@ -347,9 +331,7 @@ static struct arm_idlect1_clk tc_ck = {
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.name = "tc_ck",
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.ops = &clkops_null,
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.parent = &ck_dpll1,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
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CLOCK_IN_OMAP730 | CLOCK_IN_OMAP310 |
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RATE_PROPAGATES | CLOCK_IDLE_CONTROL,
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.flags = RATE_PROPAGATES | CLOCK_IDLE_CONTROL,
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.rate_offset = CKCTL_TCDIV_OFFSET,
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.recalc = &omap1_ckctl_recalc,
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.round_rate = omap1_clk_round_rate_ckctl_arm,
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@ -362,7 +344,6 @@ static struct clk arminth_ck1510 = {
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.name = "arminth_ck",
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.ops = &clkops_null,
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.parent = &tc_ck.clk,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
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.recalc = &followparent_recalc,
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/* Note: On 1510 the frequency follows TC_CK
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*
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@ -375,7 +356,6 @@ static struct clk tipb_ck = {
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.name = "tipb_ck",
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.ops = &clkops_null,
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.parent = &tc_ck.clk,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
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.recalc = &followparent_recalc,
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};
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@ -384,7 +364,6 @@ static struct clk l3_ocpi_ck = {
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.name = "l3_ocpi_ck",
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.ops = &clkops_generic,
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.parent = &tc_ck.clk,
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.flags = CLOCK_IN_OMAP16XX,
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.enable_reg = (void __iomem *)ARM_IDLECT3,
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.enable_bit = EN_OCPI_CK,
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.recalc = &followparent_recalc,
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@ -394,7 +373,6 @@ static struct clk tc1_ck = {
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.name = "tc1_ck",
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.ops = &clkops_generic,
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.parent = &tc_ck.clk,
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.flags = CLOCK_IN_OMAP16XX,
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.enable_reg = (void __iomem *)ARM_IDLECT3,
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.enable_bit = EN_TC1_CK,
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.recalc = &followparent_recalc,
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@ -404,7 +382,6 @@ static struct clk tc2_ck = {
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.name = "tc2_ck",
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.ops = &clkops_generic,
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.parent = &tc_ck.clk,
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.flags = CLOCK_IN_OMAP16XX,
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.enable_reg = (void __iomem *)ARM_IDLECT3,
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.enable_bit = EN_TC2_CK,
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.recalc = &followparent_recalc,
|
||||
|
@ -415,8 +392,6 @@ static struct clk dma_ck = {
|
|||
.name = "dma_ck",
|
||||
.ops = &clkops_null,
|
||||
.parent = &tc_ck.clk,
|
||||
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
|
||||
CLOCK_IN_OMAP310,
|
||||
.recalc = &followparent_recalc,
|
||||
};
|
||||
|
||||
|
@ -424,7 +399,6 @@ static struct clk dma_lcdfree_ck = {
|
|||
.name = "dma_lcdfree_ck",
|
||||
.ops = &clkops_null,
|
||||
.parent = &tc_ck.clk,
|
||||
.flags = CLOCK_IN_OMAP16XX,
|
||||
.recalc = &followparent_recalc,
|
||||
};
|
||||
|
||||
|
@ -433,8 +407,7 @@ static struct arm_idlect1_clk api_ck = {
|
|||
.name = "api_ck",
|
||||
.ops = &clkops_generic,
|
||||
.parent = &tc_ck.clk,
|
||||
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
|
||||
CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL,
|
||||
.flags = CLOCK_IDLE_CONTROL,
|
||||
.enable_reg = (void __iomem *)ARM_IDLECT2,
|
||||
.enable_bit = EN_APICK,
|
||||
.recalc = &followparent_recalc,
|
||||
|
@ -447,8 +420,7 @@ static struct arm_idlect1_clk lb_ck = {
|
|||
.name = "lb_ck",
|
||||
.ops = &clkops_generic,
|
||||
.parent = &tc_ck.clk,
|
||||
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
|
||||
CLOCK_IDLE_CONTROL,
|
||||
.flags = CLOCK_IDLE_CONTROL,
|
||||
.enable_reg = (void __iomem *)ARM_IDLECT2,
|
||||
.enable_bit = EN_LBCK,
|
||||
.recalc = &followparent_recalc,
|
||||
|
@ -460,7 +432,6 @@ static struct clk rhea1_ck = {
|
|||
.name = "rhea1_ck",
|
||||
.ops = &clkops_null,
|
||||
.parent = &tc_ck.clk,
|
||||
.flags = CLOCK_IN_OMAP16XX,
|
||||
.recalc = &followparent_recalc,
|
||||
};
|
||||
|
||||
|
@ -468,7 +439,6 @@ static struct clk rhea2_ck = {
|
|||
.name = "rhea2_ck",
|
||||
.ops = &clkops_null,
|
||||
.parent = &tc_ck.clk,
|
||||
.flags = CLOCK_IN_OMAP16XX,
|
||||
.recalc = &followparent_recalc,
|
||||
};
|
||||
|
||||
|
@ -476,7 +446,6 @@ static struct clk lcd_ck_16xx = {
|
|||
.name = "lcd_ck",
|
||||
.ops = &clkops_generic,
|
||||
.parent = &ck_dpll1,
|
||||
.flags = CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP730,
|
||||
.enable_reg = (void __iomem *)ARM_IDLECT2,
|
||||
.enable_bit = EN_LCDCK,
|
||||
.rate_offset = CKCTL_LCDDIV_OFFSET,
|
||||
|
@ -490,8 +459,7 @@ static struct arm_idlect1_clk lcd_ck_1510 = {
|
|||
.name = "lcd_ck",
|
||||
.ops = &clkops_generic,
|
||||
.parent = &ck_dpll1,
|
||||
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
|
||||
CLOCK_IDLE_CONTROL,
|
||||
.flags = CLOCK_IDLE_CONTROL,
|
||||
.enable_reg = (void __iomem *)ARM_IDLECT2,
|
||||
.enable_bit = EN_LCDCK,
|
||||
.rate_offset = CKCTL_LCDDIV_OFFSET,
|
||||
|
@ -508,8 +476,7 @@ static struct clk uart1_1510 = {
|
|||
/* Direct from ULPD, no real parent */
|
||||
.parent = &armper_ck.clk,
|
||||
.rate = 12000000,
|
||||
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
|
||||
ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
|
||||
.flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
|
||||
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
|
||||
.enable_bit = 29, /* Chooses between 12MHz and 48MHz */
|
||||
.set_rate = &omap1_set_uart_rate,
|
||||
|
@ -523,8 +490,8 @@ static struct uart_clk uart1_16xx = {
|
|||
/* Direct from ULPD, no real parent */
|
||||
.parent = &armper_ck.clk,
|
||||
.rate = 48000000,
|
||||
.flags = CLOCK_IN_OMAP16XX | RATE_FIXED |
|
||||
ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
|
||||
.flags = RATE_FIXED | ENABLE_REG_32BIT |
|
||||
CLOCK_NO_IDLE_PARENT,
|
||||
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
|
||||
.enable_bit = 29,
|
||||
},
|
||||
|
@ -537,9 +504,7 @@ static struct clk uart2_ck = {
|
|||
/* Direct from ULPD, no real parent */
|
||||
.parent = &armper_ck.clk,
|
||||
.rate = 12000000,
|
||||
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
|
||||
CLOCK_IN_OMAP310 | ENABLE_REG_32BIT |
|
||||
CLOCK_NO_IDLE_PARENT,
|
||||
.flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
|
||||
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
|
||||
.enable_bit = 30, /* Chooses between 12MHz and 48MHz */
|
||||
.set_rate = &omap1_set_uart_rate,
|
||||
|
@ -552,8 +517,7 @@ static struct clk uart3_1510 = {
|
|||
/* Direct from ULPD, no real parent */
|
||||
.parent = &armper_ck.clk,
|
||||
.rate = 12000000,
|
||||
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
|
||||
ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
|
||||
.flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
|
||||
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
|
||||
.enable_bit = 31, /* Chooses between 12MHz and 48MHz */
|
||||
.set_rate = &omap1_set_uart_rate,
|
||||
|
@ -567,8 +531,8 @@ static struct uart_clk uart3_16xx = {
|
|||
/* Direct from ULPD, no real parent */
|
||||
.parent = &armper_ck.clk,
|
||||
.rate = 48000000,
|
||||
.flags = CLOCK_IN_OMAP16XX | RATE_FIXED |
|
||||
ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
|
||||
.flags = RATE_FIXED | ENABLE_REG_32BIT |
|
||||
CLOCK_NO_IDLE_PARENT,
|
||||
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
|
||||
.enable_bit = 31,
|
||||
},
|
||||
|
@ -580,8 +544,7 @@ static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */
|
|||
.ops = &clkops_generic,
|
||||
/* Direct from ULPD, no parent */
|
||||
.rate = 6000000,
|
||||
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
|
||||
CLOCK_IN_OMAP310 | RATE_FIXED | ENABLE_REG_32BIT,
|
||||
.flags = RATE_FIXED | ENABLE_REG_32BIT,
|
||||
.enable_reg = (void __iomem *)ULPD_CLOCK_CTRL,
|
||||
.enable_bit = USB_MCLK_EN_BIT,
|
||||
};
|
||||
|
@ -591,8 +554,7 @@ static struct clk usb_hhc_ck1510 = {
|
|||
.ops = &clkops_generic,
|
||||
/* Direct from ULPD, no parent */
|
||||
.rate = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */
|
||||
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
|
||||
RATE_FIXED | ENABLE_REG_32BIT,
|
||||
.flags = RATE_FIXED | ENABLE_REG_32BIT,
|
||||
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
|
||||
.enable_bit = USB_HOST_HHC_UHOST_EN,
|
||||
};
|
||||
|
@ -603,8 +565,7 @@ static struct clk usb_hhc_ck16xx = {
|
|||
/* Direct from ULPD, no parent */
|
||||
.rate = 48000000,
|
||||
/* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */
|
||||
.flags = CLOCK_IN_OMAP16XX |
|
||||
RATE_FIXED | ENABLE_REG_32BIT,
|
||||
.flags = RATE_FIXED | ENABLE_REG_32BIT,
|
||||
.enable_reg = (void __iomem *)OTG_BASE + 0x08 /* OTG_SYSCON_2 */,
|
||||
.enable_bit = 8 /* UHOST_EN */,
|
||||
};
|
||||
|
@ -614,7 +575,7 @@ static struct clk usb_dc_ck = {
|
|||
.ops = &clkops_generic,
|
||||
/* Direct from ULPD, no parent */
|
||||
.rate = 48000000,
|
||||
.flags = CLOCK_IN_OMAP16XX | RATE_FIXED,
|
||||
.flags = RATE_FIXED,
|
||||
.enable_reg = (void __iomem *)SOFT_REQ_REG,
|
||||
.enable_bit = 4,
|
||||
};
|
||||
|
@ -624,7 +585,7 @@ static struct clk mclk_1510 = {
|
|||
.ops = &clkops_generic,
|
||||
/* Direct from ULPD, no parent. May be enabled by ext hardware. */
|
||||
.rate = 12000000,
|
||||
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | RATE_FIXED,
|
||||
.flags = RATE_FIXED,
|
||||
.enable_reg = (void __iomem *)SOFT_REQ_REG,
|
||||
.enable_bit = 6,
|
||||
};
|
||||
|
@ -633,7 +594,6 @@ static struct clk mclk_16xx = {
|
|||
.name = "mclk",
|
||||
.ops = &clkops_generic,
|
||||
/* Direct from ULPD, no parent. May be enabled by ext hardware. */
|
||||
.flags = CLOCK_IN_OMAP16XX,
|
||||
.enable_reg = (void __iomem *)COM_CLK_DIV_CTRL_SEL,
|
||||
.enable_bit = COM_ULPD_PLL_CLK_REQ,
|
||||
.set_rate = &omap1_set_ext_clk_rate,
|
||||
|
@ -646,14 +606,13 @@ static struct clk bclk_1510 = {
|
|||
.ops = &clkops_generic,
|
||||
/* Direct from ULPD, no parent. May be enabled by ext hardware. */
|
||||
.rate = 12000000,
|
||||
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | RATE_FIXED,
|
||||
.flags = RATE_FIXED,
|
||||
};
|
||||
|
||||
static struct clk bclk_16xx = {
|
||||
.name = "bclk",
|
||||
.ops = &clkops_generic,
|
||||
/* Direct from ULPD, no parent. May be enabled by ext hardware. */
|
||||
.flags = CLOCK_IN_OMAP16XX,
|
||||
.enable_reg = (void __iomem *)SWD_CLK_DIV_CTRL_SEL,
|
||||
.enable_bit = SWD_ULPD_PLL_CLK_REQ,
|
||||
.set_rate = &omap1_set_ext_clk_rate,
|
||||
|
@ -667,9 +626,7 @@ static struct clk mmc1_ck = {
|
|||
/* Functional clock is direct from ULPD, interface clock is ARMPER */
|
||||
.parent = &armper_ck.clk,
|
||||
.rate = 48000000,
|
||||
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
|
||||
CLOCK_IN_OMAP310 | RATE_FIXED | ENABLE_REG_32BIT |
|
||||
CLOCK_NO_IDLE_PARENT,
|
||||
.flags = RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
|
||||
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
|
||||
.enable_bit = 23,
|
||||
};
|
||||
|
@ -681,8 +638,7 @@ static struct clk mmc2_ck = {
|
|||
/* Functional clock is direct from ULPD, interface clock is ARMPER */
|
||||
.parent = &armper_ck.clk,
|
||||
.rate = 48000000,
|
||||
.flags = CLOCK_IN_OMAP16XX |
|
||||
RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
|
||||
.flags = RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
|
||||
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
|
||||
.enable_bit = 20,
|
||||
};
|
||||
|
@ -690,8 +646,6 @@ static struct clk mmc2_ck = {
|
|||
static struct clk virtual_ck_mpu = {
|
||||
.name = "mpu",
|
||||
.ops = &clkops_null,
|
||||
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
|
||||
CLOCK_IN_OMAP310,
|
||||
.parent = &arm_ck, /* Is smarter alias for */
|
||||
.recalc = &followparent_recalc,
|
||||
.set_rate = &omap1_select_table_rate,
|
||||
|
@ -704,8 +658,7 @@ static struct clk i2c_fck = {
|
|||
.name = "i2c_fck",
|
||||
.id = 1,
|
||||
.ops = &clkops_null,
|
||||
.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
|
||||
CLOCK_NO_IDLE_PARENT,
|
||||
.flags = CLOCK_NO_IDLE_PARENT,
|
||||
.parent = &armxor_ck.clk,
|
||||
.recalc = &followparent_recalc,
|
||||
};
|
||||
|
@ -714,62 +667,9 @@ static struct clk i2c_ick = {
|
|||
.name = "i2c_ick",
|
||||
.id = 1,
|
||||
.ops = &clkops_null,
|
||||
.flags = CLOCK_IN_OMAP16XX | CLOCK_NO_IDLE_PARENT,
|
||||
.flags = CLOCK_NO_IDLE_PARENT,
|
||||
.parent = &armper_ck.clk,
|
||||
.recalc = &followparent_recalc,
|
||||
};
|
||||
|
||||
static struct clk * onchip_clks[] = {
|
||||
/* non-ULPD clocks */
|
||||
&ck_ref,
|
||||
&ck_dpll1,
|
||||
/* CK_GEN1 clocks */
|
||||
&ck_dpll1out.clk,
|
||||
&sossi_ck,
|
||||
&arm_ck,
|
||||
&armper_ck.clk,
|
||||
&arm_gpio_ck,
|
||||
&armxor_ck.clk,
|
||||
&armtim_ck.clk,
|
||||
&armwdt_ck.clk,
|
||||
&arminth_ck1510, &arminth_ck16xx,
|
||||
/* CK_GEN2 clocks */
|
||||
&dsp_ck,
|
||||
&dspmmu_ck,
|
||||
&dspper_ck,
|
||||
&dspxor_ck,
|
||||
&dsptim_ck,
|
||||
/* CK_GEN3 clocks */
|
||||
&tc_ck.clk,
|
||||
&tipb_ck,
|
||||
&l3_ocpi_ck,
|
||||
&tc1_ck,
|
||||
&tc2_ck,
|
||||
&dma_ck,
|
||||
&dma_lcdfree_ck,
|
||||
&api_ck.clk,
|
||||
&lb_ck.clk,
|
||||
&rhea1_ck,
|
||||
&rhea2_ck,
|
||||
&lcd_ck_16xx,
|
||||
&lcd_ck_1510.clk,
|
||||
/* ULPD clocks */
|
||||
&uart1_1510,
|
||||
&uart1_16xx.clk,
|
||||
&uart2_ck,
|
||||
&uart3_1510,
|
||||
&uart3_16xx.clk,
|
||||
&usb_clko,
|
||||
&usb_hhc_ck1510, &usb_hhc_ck16xx,
|
||||
&usb_dc_ck,
|
||||
&mclk_1510, &mclk_16xx,
|
||||
&bclk_1510, &bclk_16xx,
|
||||
&mmc1_ck,
|
||||
&mmc2_ck,
|
||||
/* Virtual clocks */
|
||||
&virtual_ck_mpu,
|
||||
&i2c_fck,
|
||||
&i2c_ick,
|
||||
};
|
||||
|
||||
#endif
|
||||
|
|
|
@ -11,6 +11,7 @@ choice
|
|||
|
||||
config ARCH_OMAP1
|
||||
bool "TI OMAP1"
|
||||
select COMMON_CLKDEV
|
||||
|
||||
config ARCH_OMAP2
|
||||
bool "TI OMAP2"
|
||||
|
|
|
@ -36,6 +36,7 @@ static struct clk_functions *arch_clock;
|
|||
* Standard clock functions defined in include/linux/clk.h
|
||||
*-------------------------------------------------------------------------*/
|
||||
|
||||
#ifndef CONFIG_COMMON_CLKDEV
|
||||
/*
|
||||
* Returns a clock. Note that we first try to use device id on the bus
|
||||
* and clock name. If this fails, we try to use clock name only.
|
||||
|
@ -72,6 +73,7 @@ found:
|
|||
return clk;
|
||||
}
|
||||
EXPORT_SYMBOL(clk_get);
|
||||
#endif
|
||||
|
||||
int clk_enable(struct clk *clk)
|
||||
{
|
||||
|
@ -145,10 +147,12 @@ unsigned long clk_get_rate(struct clk *clk)
|
|||
}
|
||||
EXPORT_SYMBOL(clk_get_rate);
|
||||
|
||||
#ifndef CONFIG_COMMON_CLKDEV
|
||||
void clk_put(struct clk *clk)
|
||||
{
|
||||
}
|
||||
EXPORT_SYMBOL(clk_put);
|
||||
#endif
|
||||
|
||||
/*-------------------------------------------------------------------------
|
||||
* Optional clock functions defined in include/linux/clk.h
|
||||
|
|
|
@ -0,0 +1,13 @@
|
|||
#ifndef __MACH_CLKDEV_H
|
||||
#define __MACH_CLKDEV_H
|
||||
|
||||
static inline int __clk_get(struct clk *clk)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
static inline void __clk_put(struct clk *clk)
|
||||
{
|
||||
}
|
||||
|
||||
#endif
|
|
@ -136,11 +136,7 @@ extern const struct clkops clkops_null;
|
|||
#define CONFIG_PARTICIPANT (1 << 10) /* Fundamental clock */
|
||||
#define ENABLE_ON_INIT (1 << 11) /* Enable upon framework init */
|
||||
#define INVERT_ENABLE (1 << 12) /* 0 enables, 1 disables */
|
||||
/* bits 13-20 are currently free */
|
||||
#define CLOCK_IN_OMAP310 (1 << 21)
|
||||
#define CLOCK_IN_OMAP730 (1 << 22)
|
||||
#define CLOCK_IN_OMAP1510 (1 << 23)
|
||||
#define CLOCK_IN_OMAP16XX (1 << 24)
|
||||
/* bits 13-24 are currently free */
|
||||
#define CLOCK_IN_OMAP242X (1 << 25)
|
||||
#define CLOCK_IN_OMAP243X (1 << 26)
|
||||
#define CLOCK_IN_OMAP343X (1 << 27) /* clocks common to all 343X */
|
||||
|
|
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