ARM: AMx3xx: hwmod: Add data for RNG
Hardware random number generator is present in both AM33xx and AM43xx SoC's. So moving the hwmod data to common data. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -68,6 +68,7 @@ extern struct omap_hwmod_ocp_if am33xx_l4_ls__uart6;
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extern struct omap_hwmod_ocp_if am33xx_l3_main__ocmc;
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extern struct omap_hwmod_ocp_if am33xx_l3_main__sha0;
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extern struct omap_hwmod_ocp_if am33xx_l3_main__aes0;
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extern struct omap_hwmod_ocp_if am33xx_l4_per__rng;
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extern struct omap_hwmod am33xx_l3_main_hwmod;
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extern struct omap_hwmod am33xx_l3_s_hwmod;
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@ -80,6 +81,7 @@ extern struct omap_hwmod am33xx_gfx_hwmod;
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extern struct omap_hwmod am33xx_prcm_hwmod;
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extern struct omap_hwmod am33xx_aes0_hwmod;
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extern struct omap_hwmod am33xx_sha0_hwmod;
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extern struct omap_hwmod am33xx_rng_hwmod;
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extern struct omap_hwmod am33xx_ocmcram_hwmod;
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extern struct omap_hwmod am33xx_smartreflex0_hwmod;
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extern struct omap_hwmod am33xx_smartreflex1_hwmod;
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@ -547,3 +547,11 @@ struct omap_hwmod_ocp_if am33xx_l3_main__aes0 = {
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.addr = am33xx_aes0_addrs,
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4 per -> rng */
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struct omap_hwmod_ocp_if am33xx_l4_per__rng = {
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.master = &am33xx_l4_ls_hwmod,
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.slave = &am33xx_rng_hwmod,
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.clk = "rng_fck",
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.user = OCP_USER_MPU,
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};
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@ -268,6 +268,33 @@ struct omap_hwmod am33xx_sha0_hwmod = {
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},
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};
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/* rng */
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static struct omap_hwmod_class_sysconfig am33xx_rng_sysc = {
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.rev_offs = 0x1fe0,
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.sysc_offs = 0x1fe4,
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.sysc_flags = SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE,
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.idlemodes = SIDLE_FORCE | SIDLE_NO,
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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static struct omap_hwmod_class am33xx_rng_hwmod_class = {
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.name = "rng",
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.sysc = &am33xx_rng_sysc,
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};
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struct omap_hwmod am33xx_rng_hwmod = {
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.name = "rng",
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.class = &am33xx_rng_hwmod_class,
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.clkdm_name = "l4ls_clkdm",
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.flags = HWMOD_SWSUP_SIDLE,
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.main_clk = "rng_fck",
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.prcm = {
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.omap4 = {
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/* ocmcram */
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static struct omap_hwmod_class am33xx_ocmcram_hwmod_class = {
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.name = "ocmcram",
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@ -1315,6 +1342,7 @@ static void omap_hwmod_am33xx_clkctrl(void)
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CLKCTRL(am33xx_ocmcram_hwmod , AM33XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_sha0_hwmod , AM33XX_CM_PER_SHA0_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_aes0_hwmod , AM33XX_CM_PER_AES0_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_rng_hwmod, AM33XX_CM_PER_RNG_CLKCTRL_OFFSET);
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}
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static void omap_hwmod_am33xx_rst(void)
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@ -1388,6 +1416,7 @@ static void omap_hwmod_am43xx_clkctrl(void)
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CLKCTRL(am33xx_ocmcram_hwmod , AM43XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_sha0_hwmod , AM43XX_CM_PER_SHA0_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_aes0_hwmod , AM43XX_CM_PER_AES0_CLKCTRL_OFFSET);
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CLKCTRL(am33xx_rng_hwmod, AM43XX_CM_PER_RNG_CLKCTRL_OFFSET);
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}
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static void omap_hwmod_am43xx_rst(void)
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@ -503,41 +503,6 @@ static struct omap_hwmod_ocp_if am33xx_l3_s__usbss = {
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.flags = OCPIF_SWSUP_IDLE,
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};
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/* rng */
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static struct omap_hwmod_class_sysconfig am33xx_rng_sysc = {
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.rev_offs = 0x1fe0,
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.sysc_offs = 0x1fe4,
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.sysc_flags = SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE,
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.idlemodes = SIDLE_FORCE | SIDLE_NO,
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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static struct omap_hwmod_class am33xx_rng_hwmod_class = {
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.name = "rng",
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.sysc = &am33xx_rng_sysc,
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};
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static struct omap_hwmod am33xx_rng_hwmod = {
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.name = "rng",
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.class = &am33xx_rng_hwmod_class,
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.clkdm_name = "l4ls_clkdm",
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.flags = HWMOD_SWSUP_SIDLE,
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.main_clk = "rng_fck",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = AM33XX_CM_PER_RNG_CLKCTRL_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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static struct omap_hwmod_ocp_if am33xx_l4_per__rng = {
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.master = &am33xx_l4_ls_hwmod,
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.slave = &am33xx_rng_hwmod,
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.clk = "rng_fck",
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.user = OCP_USER_MPU,
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};
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static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = {
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&am33xx_l3_main__emif,
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&am33xx_mpu__l3_main,
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@ -949,6 +949,7 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
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&am33xx_l4_per__i2c2,
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&am33xx_l4_per__i2c3,
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&am33xx_l4_per__mailbox,
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&am33xx_l4_per__rng,
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&am33xx_l4_ls__mcasp0,
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&am33xx_l4_ls__mcasp1,
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&am33xx_l4_ls__mmc0,
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@ -92,6 +92,7 @@
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#define AM43XX_CM_PER_MAILBOX0_CLKCTRL_OFFSET 0x04b8
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#define AM43XX_CM_PER_MMC0_CLKCTRL_OFFSET 0x04c0
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#define AM43XX_CM_PER_MMC1_CLKCTRL_OFFSET 0x04c8
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#define AM43XX_CM_PER_RNG_CLKCTRL_OFFSET 0x04e0
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#define AM43XX_CM_PER_SPI0_CLKCTRL_OFFSET 0x0500
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#define AM43XX_CM_PER_SPI1_CLKCTRL_OFFSET 0x0508
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#define AM43XX_CM_PER_SPINLOCK_CLKCTRL_OFFSET 0x0528
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