iio: counter: Add support for STM32 LPTimer
Add support for STM32 Low-Power Timer, that can be used as counter or quadrature encoder. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
This commit is contained in:
Fabrice Gasnier
Lee Jones
Родитель
717e6922de
Коммит
d8958824cf
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@ -0,0 +1,57 @@
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What: /sys/bus/iio/devices/iio:deviceX/in_count0_preset
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KernelVersion: 4.13
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Contact: fabrice.gasnier@st.com
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Description:
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Reading returns the current preset value. Writing sets the
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preset value. Encoder counts continuously from 0 to preset
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value, depending on direction (up/down).
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What: /sys/bus/iio/devices/iio:deviceX/in_count_quadrature_mode_available
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KernelVersion: 4.13
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Contact: fabrice.gasnier@st.com
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Description:
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Reading returns the list possible quadrature modes.
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What: /sys/bus/iio/devices/iio:deviceX/in_count0_quadrature_mode
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KernelVersion: 4.13
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Contact: fabrice.gasnier@st.com
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Description:
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Configure the device counter quadrature modes:
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- non-quadrature:
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Encoder IN1 input servers as the count input (up
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direction).
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- quadrature:
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Encoder IN1 and IN2 inputs are mixed to get direction
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and count.
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What: /sys/bus/iio/devices/iio:deviceX/in_count_polarity_available
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KernelVersion: 4.13
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Contact: fabrice.gasnier@st.com
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Description:
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Reading returns the list possible active edges.
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What: /sys/bus/iio/devices/iio:deviceX/in_count0_polarity
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KernelVersion: 4.13
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Contact: fabrice.gasnier@st.com
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Description:
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Configure the device encoder/counter active edge:
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- rising-edge
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- falling-edge
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- both-edges
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In non-quadrature mode, device counts up on active edge.
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In quadrature mode, encoder counting scenarios are as follows:
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----------------------------------------------------------------
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| Active | Level on | IN1 signal | IN2 signal |
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| edge | opposite |------------------------------------------
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| | signal | Rising | Falling | Rising | Falling |
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----------------------------------------------------------------
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| Rising | High -> | Down | - | Up | - |
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| edge | Low -> | Up | - | Down | - |
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----------------------------------------------------------------
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| Falling | High -> | - | Up | - | Down |
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| edge | Low -> | - | Down | - | Up |
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----------------------------------------------------------------
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| Both | High -> | Down | Up | Up | Down |
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| edges | Low -> | Up | Down | Down | Up |
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----------------------------------------------------------------
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@ -21,4 +21,13 @@ config 104_QUAD_8
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The base port addresses for the devices may be configured via the base
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array module parameter.
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config STM32_LPTIMER_CNT
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tristate "STM32 LP Timer encoder counter driver"
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depends on MFD_STM32_LPTIMER || COMPILE_TEST
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help
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Select this option to enable STM32 Low-Power Timer quadrature encoder
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and counter driver.
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To compile this driver as a module, choose M here: the
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module will be called stm32-lptimer-cnt.
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endmenu
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@ -5,3 +5,4 @@
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# When adding new entries keep the list in alphabetical order
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obj-$(CONFIG_104_QUAD_8) += 104-quad-8.o
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obj-$(CONFIG_STM32_LPTIMER_CNT) += stm32-lptimer-cnt.o
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@ -0,0 +1,383 @@
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/*
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* STM32 Low-Power Timer Encoder and Counter driver
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*
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* Copyright (C) STMicroelectronics 2017
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*
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* Author: Fabrice Gasnier <fabrice.gasnier@st.com>
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*
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* Inspired by 104-quad-8 and stm32-timer-trigger drivers.
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*
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* License terms: GNU General Public License (GPL), version 2
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*/
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#include <linux/bitfield.h>
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#include <linux/iio/iio.h>
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#include <linux/mfd/stm32-lptimer.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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struct stm32_lptim_cnt {
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struct device *dev;
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struct regmap *regmap;
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struct clk *clk;
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u32 preset;
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u32 polarity;
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u32 quadrature_mode;
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};
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static int stm32_lptim_is_enabled(struct stm32_lptim_cnt *priv)
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{
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u32 val;
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int ret;
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ret = regmap_read(priv->regmap, STM32_LPTIM_CR, &val);
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if (ret)
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return ret;
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return FIELD_GET(STM32_LPTIM_ENABLE, val);
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}
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static int stm32_lptim_set_enable_state(struct stm32_lptim_cnt *priv,
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int enable)
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{
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int ret;
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u32 val;
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val = FIELD_PREP(STM32_LPTIM_ENABLE, enable);
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ret = regmap_write(priv->regmap, STM32_LPTIM_CR, val);
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if (ret)
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return ret;
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if (!enable) {
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clk_disable(priv->clk);
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return 0;
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}
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/* LP timer must be enabled before writing CMP & ARR */
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ret = regmap_write(priv->regmap, STM32_LPTIM_ARR, priv->preset);
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if (ret)
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return ret;
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ret = regmap_write(priv->regmap, STM32_LPTIM_CMP, 0);
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if (ret)
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return ret;
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/* ensure CMP & ARR registers are properly written */
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ret = regmap_read_poll_timeout(priv->regmap, STM32_LPTIM_ISR, val,
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(val & STM32_LPTIM_CMPOK_ARROK),
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100, 1000);
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if (ret)
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return ret;
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ret = regmap_write(priv->regmap, STM32_LPTIM_ICR,
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STM32_LPTIM_CMPOKCF_ARROKCF);
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if (ret)
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return ret;
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ret = clk_enable(priv->clk);
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if (ret) {
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regmap_write(priv->regmap, STM32_LPTIM_CR, 0);
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return ret;
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}
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/* Start LP timer in continuous mode */
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return regmap_update_bits(priv->regmap, STM32_LPTIM_CR,
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STM32_LPTIM_CNTSTRT, STM32_LPTIM_CNTSTRT);
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}
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static int stm32_lptim_setup(struct stm32_lptim_cnt *priv, int enable)
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{
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u32 mask = STM32_LPTIM_ENC | STM32_LPTIM_COUNTMODE |
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STM32_LPTIM_CKPOL | STM32_LPTIM_PRESC;
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u32 val;
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/* Setup LP timer encoder/counter and polarity, without prescaler */
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if (priv->quadrature_mode)
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val = enable ? STM32_LPTIM_ENC : 0;
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else
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val = enable ? STM32_LPTIM_COUNTMODE : 0;
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val |= FIELD_PREP(STM32_LPTIM_CKPOL, enable ? priv->polarity : 0);
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return regmap_update_bits(priv->regmap, STM32_LPTIM_CFGR, mask, val);
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}
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static int stm32_lptim_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val, int val2, long mask)
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{
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struct stm32_lptim_cnt *priv = iio_priv(indio_dev);
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int ret;
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switch (mask) {
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case IIO_CHAN_INFO_ENABLE:
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if (val < 0 || val > 1)
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return -EINVAL;
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/* Check nobody uses the timer, or already disabled/enabled */
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ret = stm32_lptim_is_enabled(priv);
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if ((ret < 0) || (!ret && !val))
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return ret;
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if (val && ret)
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return -EBUSY;
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ret = stm32_lptim_setup(priv, val);
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if (ret)
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return ret;
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return stm32_lptim_set_enable_state(priv, val);
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default:
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return -EINVAL;
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}
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}
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static int stm32_lptim_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long mask)
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{
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struct stm32_lptim_cnt *priv = iio_priv(indio_dev);
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u32 dat;
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int ret;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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ret = regmap_read(priv->regmap, STM32_LPTIM_CNT, &dat);
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if (ret)
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return ret;
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*val = dat;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_ENABLE:
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ret = stm32_lptim_is_enabled(priv);
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if (ret < 0)
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return ret;
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*val = ret;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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/* Non-quadrature mode: scale = 1 */
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*val = 1;
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*val2 = 0;
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if (priv->quadrature_mode) {
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/*
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* Quadrature encoder mode:
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* - both edges, quarter cycle, scale is 0.25
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* - either rising/falling edge scale is 0.5
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*/
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if (priv->polarity > 1)
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*val2 = 2;
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else
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*val2 = 1;
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}
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return IIO_VAL_FRACTIONAL_LOG2;
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default:
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return -EINVAL;
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}
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}
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static const struct iio_info stm32_lptim_cnt_iio_info = {
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.read_raw = stm32_lptim_read_raw,
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.write_raw = stm32_lptim_write_raw,
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.driver_module = THIS_MODULE,
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};
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static const char *const stm32_lptim_quadrature_modes[] = {
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"non-quadrature",
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"quadrature",
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};
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static int stm32_lptim_get_quadrature_mode(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan)
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{
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struct stm32_lptim_cnt *priv = iio_priv(indio_dev);
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return priv->quadrature_mode;
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}
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static int stm32_lptim_set_quadrature_mode(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan,
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unsigned int type)
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{
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struct stm32_lptim_cnt *priv = iio_priv(indio_dev);
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if (stm32_lptim_is_enabled(priv))
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return -EBUSY;
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priv->quadrature_mode = type;
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return 0;
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}
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static const struct iio_enum stm32_lptim_quadrature_mode_en = {
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.items = stm32_lptim_quadrature_modes,
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.num_items = ARRAY_SIZE(stm32_lptim_quadrature_modes),
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.get = stm32_lptim_get_quadrature_mode,
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.set = stm32_lptim_set_quadrature_mode,
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};
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static const char * const stm32_lptim_cnt_polarity[] = {
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"rising-edge", "falling-edge", "both-edges",
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};
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static int stm32_lptim_cnt_get_polarity(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan)
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{
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struct stm32_lptim_cnt *priv = iio_priv(indio_dev);
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return priv->polarity;
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}
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static int stm32_lptim_cnt_set_polarity(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan,
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unsigned int type)
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{
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struct stm32_lptim_cnt *priv = iio_priv(indio_dev);
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if (stm32_lptim_is_enabled(priv))
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return -EBUSY;
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priv->polarity = type;
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return 0;
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}
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static const struct iio_enum stm32_lptim_cnt_polarity_en = {
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.items = stm32_lptim_cnt_polarity,
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.num_items = ARRAY_SIZE(stm32_lptim_cnt_polarity),
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.get = stm32_lptim_cnt_get_polarity,
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.set = stm32_lptim_cnt_set_polarity,
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};
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static ssize_t stm32_lptim_cnt_get_preset(struct iio_dev *indio_dev,
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uintptr_t private,
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const struct iio_chan_spec *chan,
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char *buf)
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{
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struct stm32_lptim_cnt *priv = iio_priv(indio_dev);
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return snprintf(buf, PAGE_SIZE, "%u\n", priv->preset);
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}
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static ssize_t stm32_lptim_cnt_set_preset(struct iio_dev *indio_dev,
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uintptr_t private,
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const struct iio_chan_spec *chan,
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const char *buf, size_t len)
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{
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struct stm32_lptim_cnt *priv = iio_priv(indio_dev);
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int ret;
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if (stm32_lptim_is_enabled(priv))
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return -EBUSY;
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ret = kstrtouint(buf, 0, &priv->preset);
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if (ret)
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return ret;
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if (priv->preset > STM32_LPTIM_MAX_ARR)
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return -EINVAL;
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return len;
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}
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/* LP timer with encoder */
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static const struct iio_chan_spec_ext_info stm32_lptim_enc_ext_info[] = {
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{
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.name = "preset",
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.shared = IIO_SEPARATE,
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.read = stm32_lptim_cnt_get_preset,
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.write = stm32_lptim_cnt_set_preset,
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},
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IIO_ENUM("polarity", IIO_SEPARATE, &stm32_lptim_cnt_polarity_en),
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IIO_ENUM_AVAILABLE("polarity", &stm32_lptim_cnt_polarity_en),
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IIO_ENUM("quadrature_mode", IIO_SEPARATE,
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&stm32_lptim_quadrature_mode_en),
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IIO_ENUM_AVAILABLE("quadrature_mode", &stm32_lptim_quadrature_mode_en),
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{}
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};
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static const struct iio_chan_spec stm32_lptim_enc_channels = {
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.type = IIO_COUNT,
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.channel = 0,
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
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BIT(IIO_CHAN_INFO_ENABLE) |
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BIT(IIO_CHAN_INFO_SCALE),
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.ext_info = stm32_lptim_enc_ext_info,
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.indexed = 1,
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};
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/* LP timer without encoder (counter only) */
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static const struct iio_chan_spec_ext_info stm32_lptim_cnt_ext_info[] = {
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{
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.name = "preset",
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.shared = IIO_SEPARATE,
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.read = stm32_lptim_cnt_get_preset,
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.write = stm32_lptim_cnt_set_preset,
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},
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IIO_ENUM("polarity", IIO_SEPARATE, &stm32_lptim_cnt_polarity_en),
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IIO_ENUM_AVAILABLE("polarity", &stm32_lptim_cnt_polarity_en),
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{}
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};
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static const struct iio_chan_spec stm32_lptim_cnt_channels = {
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.type = IIO_COUNT,
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.channel = 0,
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
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BIT(IIO_CHAN_INFO_ENABLE) |
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BIT(IIO_CHAN_INFO_SCALE),
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.ext_info = stm32_lptim_cnt_ext_info,
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.indexed = 1,
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};
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static int stm32_lptim_cnt_probe(struct platform_device *pdev)
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{
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struct stm32_lptimer *ddata = dev_get_drvdata(pdev->dev.parent);
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struct stm32_lptim_cnt *priv;
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struct iio_dev *indio_dev;
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if (IS_ERR_OR_NULL(ddata))
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return -EINVAL;
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indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*priv));
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if (!indio_dev)
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return -ENOMEM;
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priv = iio_priv(indio_dev);
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priv->dev = &pdev->dev;
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priv->regmap = ddata->regmap;
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priv->clk = ddata->clk;
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priv->preset = STM32_LPTIM_MAX_ARR;
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indio_dev->name = dev_name(&pdev->dev);
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indio_dev->dev.parent = &pdev->dev;
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indio_dev->dev.of_node = pdev->dev.of_node;
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indio_dev->info = &stm32_lptim_cnt_iio_info;
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if (ddata->has_encoder)
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indio_dev->channels = &stm32_lptim_enc_channels;
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else
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indio_dev->channels = &stm32_lptim_cnt_channels;
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indio_dev->num_channels = 1;
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platform_set_drvdata(pdev, priv);
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return devm_iio_device_register(&pdev->dev, indio_dev);
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}
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static const struct of_device_id stm32_lptim_cnt_of_match[] = {
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{ .compatible = "st,stm32-lptimer-counter", },
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{},
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};
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MODULE_DEVICE_TABLE(of, stm32_lptim_cnt_of_match);
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static struct platform_driver stm32_lptim_cnt_driver = {
|
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.probe = stm32_lptim_cnt_probe,
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.driver = {
|
||||
.name = "stm32-lptimer-counter",
|
||||
.of_match_table = stm32_lptim_cnt_of_match,
|
||||
},
|
||||
};
|
||||
module_platform_driver(stm32_lptim_cnt_driver);
|
||||
|
||||
MODULE_AUTHOR("Fabrice Gasnier <fabrice.gasnier@st.com>");
|
||||
MODULE_ALIAS("platform:stm32-lptimer-counter");
|
||||
MODULE_DESCRIPTION("STMicroelectronics STM32 LPTIM counter driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
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