MIPS Kprobes: Refactor branch emulation
This patch refactors MIPS branch emulation code so as to allow skipping delay slot instruction in case of branch likely instructions when branch is not taken. This is useful for keeping the code common for use cases like kprobes where one would like to handle the branch instructions keeping the delay slot instuction also in picture for branch likely instructions. Also allow emulation when instruction to be decoded is not at pt_regs->cp0_epc as in case of kprobes where pt_regs->cp0_epc points to the breakpoint instruction. The patch also exports the function for modules. Signed-off-by: Maneesh Soni <manesoni@cisco.com> Signed-off-by: Victor Kamensky <kamensky@cisco.com> Cc: David Daney <david.daney@cavium.com> Cc: ananth@in.ibm.com Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2913/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Maneesh Soni
Ralf Baechle
Родитель
9233c1ee71
Коммит
d8d4e3ae0b
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@ -9,6 +9,7 @@
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#define _ASM_BRANCH_H
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#include <asm/ptrace.h>
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#include <asm/inst.h>
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static inline int delay_slot(struct pt_regs *regs)
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{
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@ -23,7 +24,11 @@ static inline unsigned long exception_epc(struct pt_regs *regs)
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return regs->cp0_epc + 4;
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}
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#define BRANCH_LIKELY_TAKEN 0x0001
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extern int __compute_return_epc(struct pt_regs *regs);
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extern int __compute_return_epc_for_insn(struct pt_regs *regs,
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union mips_instruction insn);
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static inline int compute_return_epc(struct pt_regs *regs)
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{
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@ -9,6 +9,7 @@
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/signal.h>
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#include <linux/module.h>
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#include <asm/branch.h>
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#include <asm/cpu.h>
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#include <asm/cpu-features.h>
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@ -17,28 +18,22 @@
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#include <asm/ptrace.h>
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#include <asm/uaccess.h>
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/*
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* Compute the return address and do emulate branch simulation, if required.
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/**
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* __compute_return_epc_for_insn - Computes the return address and do emulate
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* branch simulation, if required.
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*
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* @regs: Pointer to pt_regs
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* @insn: branch instruction to decode
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* @returns: -EFAULT on error and forces SIGBUS, and on success
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* returns 0 or BRANCH_LIKELY_TAKEN as appropriate after
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* evaluating the branch.
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*/
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int __compute_return_epc(struct pt_regs *regs)
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int __compute_return_epc_for_insn(struct pt_regs *regs,
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union mips_instruction insn)
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{
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unsigned int __user *addr;
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unsigned int bit, fcr31, dspcontrol;
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long epc;
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union mips_instruction insn;
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epc = regs->cp0_epc;
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if (epc & 3)
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goto unaligned;
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/*
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* Read the instruction
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*/
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addr = (unsigned int __user *) epc;
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if (__get_user(insn.word, addr)) {
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force_sig(SIGSEGV, current);
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return -EFAULT;
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}
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long epc = regs->cp0_epc;
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int ret = 0;
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switch (insn.i_format.opcode) {
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/*
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@ -64,18 +59,22 @@ int __compute_return_epc(struct pt_regs *regs)
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switch (insn.i_format.rt) {
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case bltz_op:
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case bltzl_op:
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if ((long)regs->regs[insn.i_format.rs] < 0)
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if ((long)regs->regs[insn.i_format.rs] < 0) {
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epc = epc + 4 + (insn.i_format.simmediate << 2);
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else
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if (insn.i_format.rt == bltzl_op)
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ret = BRANCH_LIKELY_TAKEN;
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} else
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epc += 8;
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regs->cp0_epc = epc;
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break;
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case bgez_op:
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case bgezl_op:
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if ((long)regs->regs[insn.i_format.rs] >= 0)
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if ((long)regs->regs[insn.i_format.rs] >= 0) {
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epc = epc + 4 + (insn.i_format.simmediate << 2);
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else
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if (insn.i_format.rt == bgezl_op)
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ret = BRANCH_LIKELY_TAKEN;
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} else
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epc += 8;
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regs->cp0_epc = epc;
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break;
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@ -83,9 +82,11 @@ int __compute_return_epc(struct pt_regs *regs)
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case bltzal_op:
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case bltzall_op:
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regs->regs[31] = epc + 8;
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if ((long)regs->regs[insn.i_format.rs] < 0)
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if ((long)regs->regs[insn.i_format.rs] < 0) {
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epc = epc + 4 + (insn.i_format.simmediate << 2);
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else
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if (insn.i_format.rt == bltzall_op)
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ret = BRANCH_LIKELY_TAKEN;
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} else
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epc += 8;
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regs->cp0_epc = epc;
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break;
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@ -93,12 +94,15 @@ int __compute_return_epc(struct pt_regs *regs)
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case bgezal_op:
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case bgezall_op:
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regs->regs[31] = epc + 8;
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if ((long)regs->regs[insn.i_format.rs] >= 0)
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if ((long)regs->regs[insn.i_format.rs] >= 0) {
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epc = epc + 4 + (insn.i_format.simmediate << 2);
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else
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if (insn.i_format.rt == bgezall_op)
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ret = BRANCH_LIKELY_TAKEN;
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} else
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epc += 8;
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regs->cp0_epc = epc;
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break;
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case bposge32_op:
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if (!cpu_has_dsp)
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goto sigill;
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@ -133,9 +137,11 @@ int __compute_return_epc(struct pt_regs *regs)
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case beq_op:
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case beql_op:
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if (regs->regs[insn.i_format.rs] ==
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regs->regs[insn.i_format.rt])
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regs->regs[insn.i_format.rt]) {
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epc = epc + 4 + (insn.i_format.simmediate << 2);
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else
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if (insn.i_format.rt == beql_op)
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ret = BRANCH_LIKELY_TAKEN;
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} else
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epc += 8;
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regs->cp0_epc = epc;
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break;
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@ -143,9 +149,11 @@ int __compute_return_epc(struct pt_regs *regs)
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case bne_op:
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case bnel_op:
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if (regs->regs[insn.i_format.rs] !=
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regs->regs[insn.i_format.rt])
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regs->regs[insn.i_format.rt]) {
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epc = epc + 4 + (insn.i_format.simmediate << 2);
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else
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if (insn.i_format.rt == bnel_op)
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ret = BRANCH_LIKELY_TAKEN;
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} else
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epc += 8;
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regs->cp0_epc = epc;
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break;
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@ -153,9 +161,11 @@ int __compute_return_epc(struct pt_regs *regs)
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case blez_op: /* not really i_format */
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case blezl_op:
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/* rt field assumed to be zero */
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if ((long)regs->regs[insn.i_format.rs] <= 0)
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if ((long)regs->regs[insn.i_format.rs] <= 0) {
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epc = epc + 4 + (insn.i_format.simmediate << 2);
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else
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if (insn.i_format.rt == bnel_op)
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ret = BRANCH_LIKELY_TAKEN;
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} else
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epc += 8;
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regs->cp0_epc = epc;
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break;
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@ -163,9 +173,11 @@ int __compute_return_epc(struct pt_regs *regs)
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case bgtz_op:
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case bgtzl_op:
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/* rt field assumed to be zero */
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if ((long)regs->regs[insn.i_format.rs] > 0)
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if ((long)regs->regs[insn.i_format.rs] > 0) {
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epc = epc + 4 + (insn.i_format.simmediate << 2);
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else
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if (insn.i_format.rt == bnel_op)
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ret = BRANCH_LIKELY_TAKEN;
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} else
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epc += 8;
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regs->cp0_epc = epc;
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break;
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@ -187,18 +199,22 @@ int __compute_return_epc(struct pt_regs *regs)
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switch (insn.i_format.rt & 3) {
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case 0: /* bc1f */
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case 2: /* bc1fl */
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if (~fcr31 & (1 << bit))
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if (~fcr31 & (1 << bit)) {
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epc = epc + 4 + (insn.i_format.simmediate << 2);
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else
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if (insn.i_format.rt == 2)
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ret = BRANCH_LIKELY_TAKEN;
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} else
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epc += 8;
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regs->cp0_epc = epc;
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break;
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case 1: /* bc1t */
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case 3: /* bc1tl */
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if (fcr31 & (1 << bit))
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if (fcr31 & (1 << bit)) {
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epc = epc + 4 + (insn.i_format.simmediate << 2);
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else
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if (insn.i_format.rt == 3)
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ret = BRANCH_LIKELY_TAKEN;
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} else
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epc += 8;
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regs->cp0_epc = epc;
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break;
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@ -239,15 +255,39 @@ int __compute_return_epc(struct pt_regs *regs)
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#endif
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}
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return 0;
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unaligned:
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printk("%s: unaligned epc - sending SIGBUS.\n", current->comm);
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force_sig(SIGBUS, current);
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return -EFAULT;
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return ret;
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sigill:
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printk("%s: DSP branch but not DSP ASE - sending SIGBUS.\n", current->comm);
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force_sig(SIGBUS, current);
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return -EFAULT;
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}
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EXPORT_SYMBOL_GPL(__compute_return_epc_for_insn);
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int __compute_return_epc(struct pt_regs *regs)
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{
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unsigned int __user *addr;
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long epc;
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union mips_instruction insn;
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epc = regs->cp0_epc;
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if (epc & 3)
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goto unaligned;
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/*
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* Read the instruction
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*/
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addr = (unsigned int __user *) epc;
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if (__get_user(insn.word, addr)) {
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force_sig(SIGSEGV, current);
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return -EFAULT;
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}
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return __compute_return_epc_for_insn(regs, insn);
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unaligned:
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printk("%s: unaligned epc - sending SIGBUS.\n", current->comm);
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force_sig(SIGBUS, current);
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return -EFAULT;
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}
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@ -245,7 +245,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
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*/
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emulpc = xcp->cp0_epc + 4; /* Snapshot emulation target */
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if (__compute_return_epc(xcp)) {
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if (__compute_return_epc(xcp) < 0) {
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#ifdef CP1DBG
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printk("failed to emulate branch at %p\n",
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(void *) (xcp->cp0_epc));
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