x86/bugs, kvm: Introduce boot-time control of L1TF mitigations
Introduce the 'l1tf=' kernel command line option to allow for boot-time
switching of mitigation that is used on processors affected by L1TF.
The possible values are:
full
Provides all available mitigations for the L1TF vulnerability. Disables
SMT and enables all mitigations in the hypervisors. SMT control via
/sys/devices/system/cpu/smt/control is still possible after boot.
Hypervisors will issue a warning when the first VM is started in
a potentially insecure configuration, i.e. SMT enabled or L1D flush
disabled.
full,force
Same as 'full', but disables SMT control. Implies the 'nosmt=force'
command line option. sysfs control of SMT and the hypervisor flush
control is disabled.
flush
Leaves SMT enabled and enables the conditional hypervisor mitigation.
Hypervisors will issue a warning when the first VM is started in a
potentially insecure configuration, i.e. SMT enabled or L1D flush
disabled.
flush,nosmt
Disables SMT and enables the conditional hypervisor mitigation. SMT
control via /sys/devices/system/cpu/smt/control is still possible
after boot. If SMT is reenabled or flushing disabled at runtime
hypervisors will issue a warning.
flush,nowarn
Same as 'flush', but hypervisors will not warn when
a VM is started in a potentially insecure configuration.
off
Disables hypervisor mitigations and doesn't emit any warnings.
Default is 'flush'.
Let KVM adhere to these semantics, which means:
- 'lt1f=full,force' : Performe L1D flushes. No runtime control
possible.
- 'l1tf=full'
- 'l1tf-flush'
- 'l1tf=flush,nosmt' : Perform L1D flushes and warn on VM start if
SMT has been runtime enabled or L1D flushing
has been run-time enabled
- 'l1tf=flush,nowarn' : Perform L1D flushes and no warnings are emitted.
- 'l1tf=off' : L1D flushes are not performed and no warnings
are emitted.
KVM can always override the L1D flushing behavior using its 'vmentry_l1d_flush'
module parameter except when lt1f=full,force is set.
This makes KVM's private 'nosmt' option redundant, and as it is a bit
non-systematic anyway (this is something to control globally, not on
hypervisor level), remove that option.
Add the missing Documentation entry for the l1tf vulnerability sysfs file
while at it.
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Jiri Kosina <jkosina@suse.cz>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Josh Poimboeuf <jpoimboe@redhat.com>
Link: https://lkml.kernel.org/r/20180713142323.202758176@linutronix.de
This commit is contained in:
Jiri Kosina
Thomas Gleixner
Родитель
fee0aede6f
Коммит
d90a7a0ec8
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@ -476,6 +476,7 @@ What: /sys/devices/system/cpu/vulnerabilities
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/sys/devices/system/cpu/vulnerabilities/spectre_v1
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/sys/devices/system/cpu/vulnerabilities/spectre_v2
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/sys/devices/system/cpu/vulnerabilities/spec_store_bypass
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/sys/devices/system/cpu/vulnerabilities/l1tf
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Date: January 2018
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Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
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Description: Information about CPU vulnerabilities
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@ -488,6 +489,9 @@ Description: Information about CPU vulnerabilities
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"Vulnerable" CPU is affected and no mitigation in effect
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"Mitigation: $M" CPU is affected and mitigation $M is in effect
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Details about the l1tf file can be found in
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Documentation/admin-guide/l1tf.rst
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What: /sys/devices/system/cpu/smt
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/sys/devices/system/cpu/smt/active
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/sys/devices/system/cpu/smt/control
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@ -1946,12 +1946,6 @@
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[KVM,ARM] Allow use of GICv4 for direct injection of
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LPIs.
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kvm-intel.nosmt=[KVM,Intel] If the L1TF CPU bug is present (CVE-2018-3620)
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and the system has SMT (aka Hyper-Threading) enabled then
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don't allow guests to be created.
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Default is 0 (allow guests to be created).
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kvm-intel.ept= [KVM,Intel] Disable extended page tables
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(virtualized MMU) support on capable Intel chips.
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Default is 1 (enabled)
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@ -1989,6 +1983,68 @@
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feature (tagged TLBs) on capable Intel chips.
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Default is 1 (enabled)
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l1tf= [X86] Control mitigation of the L1TF vulnerability on
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affected CPUs
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The kernel PTE inversion protection is unconditionally
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enabled and cannot be disabled.
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full
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Provides all available mitigations for the
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L1TF vulnerability. Disables SMT and
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enables all mitigations in the
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hypervisors, i.e. unconditional L1D flush.
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SMT control and L1D flush control via the
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sysfs interface is still possible after
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boot. Hypervisors will issue a warning
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when the first VM is started in a
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potentially insecure configuration,
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i.e. SMT enabled or L1D flush disabled.
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full,force
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Same as 'full', but disables SMT and L1D
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flush runtime control. Implies the
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'nosmt=force' command line option.
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(i.e. sysfs control of SMT is disabled.)
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flush
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Leaves SMT enabled and enables the default
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hypervisor mitigation, i.e. conditional
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L1D flush.
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SMT control and L1D flush control via the
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sysfs interface is still possible after
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boot. Hypervisors will issue a warning
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when the first VM is started in a
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potentially insecure configuration,
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i.e. SMT enabled or L1D flush disabled.
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flush,nosmt
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Disables SMT and enables the default
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hypervisor mitigation.
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SMT control and L1D flush control via the
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sysfs interface is still possible after
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boot. Hypervisors will issue a warning
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when the first VM is started in a
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potentially insecure configuration,
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i.e. SMT enabled or L1D flush disabled.
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flush,nowarn
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Same as 'flush', but hypervisors will not
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warn when a VM is started in a potentially
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insecure configuration.
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off
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Disables hypervisor mitigations and doesn't
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emit any warnings.
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Default is 'flush'.
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For details see: Documentation/admin-guide/l1tf.rst
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l2cr= [PPC]
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l3cr= [PPC]
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@ -982,4 +982,16 @@ bool xen_set_default_idle(void);
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void stop_this_cpu(void *dummy);
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void df_debug(struct pt_regs *regs, long error_code);
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void microcode_check(void);
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enum l1tf_mitigations {
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L1TF_MITIGATION_OFF,
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L1TF_MITIGATION_FLUSH_NOWARN,
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L1TF_MITIGATION_FLUSH,
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L1TF_MITIGATION_FLUSH_NOSMT,
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L1TF_MITIGATION_FULL,
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L1TF_MITIGATION_FULL_FORCE
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};
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extern enum l1tf_mitigations l1tf_mitigation;
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#endif /* _ASM_X86_PROCESSOR_H */
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@ -665,7 +665,11 @@ void x86_spec_ctrl_setup_ap(void)
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#undef pr_fmt
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#define pr_fmt(fmt) "L1TF: " fmt
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/* Default mitigation for L1TF-affected CPUs */
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enum l1tf_mitigations l1tf_mitigation __ro_after_init = L1TF_MITIGATION_FLUSH;
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#if IS_ENABLED(CONFIG_KVM_INTEL)
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EXPORT_SYMBOL_GPL(l1tf_mitigation);
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enum vmx_l1d_flush_state l1tf_vmx_mitigation = VMENTER_L1D_FLUSH_AUTO;
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EXPORT_SYMBOL_GPL(l1tf_vmx_mitigation);
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#endif
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@ -677,6 +681,20 @@ static void __init l1tf_select_mitigation(void)
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if (!boot_cpu_has_bug(X86_BUG_L1TF))
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return;
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switch (l1tf_mitigation) {
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case L1TF_MITIGATION_OFF:
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case L1TF_MITIGATION_FLUSH_NOWARN:
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case L1TF_MITIGATION_FLUSH:
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break;
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case L1TF_MITIGATION_FLUSH_NOSMT:
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case L1TF_MITIGATION_FULL:
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cpu_smt_disable(false);
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break;
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case L1TF_MITIGATION_FULL_FORCE:
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cpu_smt_disable(true);
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break;
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}
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#if CONFIG_PGTABLE_LEVELS == 2
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pr_warn("Kernel not compiled for PAE. No mitigation for L1TF\n");
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return;
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@ -695,6 +713,32 @@ static void __init l1tf_select_mitigation(void)
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setup_force_cpu_cap(X86_FEATURE_L1TF_PTEINV);
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}
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static int __init l1tf_cmdline(char *str)
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{
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if (!boot_cpu_has_bug(X86_BUG_L1TF))
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return 0;
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if (!str)
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return -EINVAL;
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if (!strcmp(str, "off"))
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l1tf_mitigation = L1TF_MITIGATION_OFF;
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else if (!strcmp(str, "flush,nowarn"))
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l1tf_mitigation = L1TF_MITIGATION_FLUSH_NOWARN;
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else if (!strcmp(str, "flush"))
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l1tf_mitigation = L1TF_MITIGATION_FLUSH;
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else if (!strcmp(str, "flush,nosmt"))
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l1tf_mitigation = L1TF_MITIGATION_FLUSH_NOSMT;
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else if (!strcmp(str, "full"))
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l1tf_mitigation = L1TF_MITIGATION_FULL;
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else if (!strcmp(str, "full,force"))
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l1tf_mitigation = L1TF_MITIGATION_FULL_FORCE;
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return 0;
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}
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early_param("l1tf", l1tf_cmdline);
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#undef pr_fmt
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#ifdef CONFIG_SYSFS
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@ -71,9 +71,6 @@ static const struct x86_cpu_id vmx_cpu_id[] = {
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};
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MODULE_DEVICE_TABLE(x86cpu, vmx_cpu_id);
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static bool __read_mostly nosmt;
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module_param(nosmt, bool, S_IRUGO);
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static bool __read_mostly enable_vpid = 1;
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module_param_named(vpid, enable_vpid, bool, 0444);
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@ -215,15 +212,31 @@ static int vmx_setup_l1d_flush(enum vmx_l1d_flush_state l1tf)
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{
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struct page *page;
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/* If set to 'auto' select 'cond' */
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if (l1tf == VMENTER_L1D_FLUSH_AUTO)
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l1tf = VMENTER_L1D_FLUSH_COND;
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if (!enable_ept) {
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l1tf_vmx_mitigation = VMENTER_L1D_FLUSH_EPT_DISABLED;
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return 0;
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}
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/* If set to auto use the default l1tf mitigation method */
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if (l1tf == VMENTER_L1D_FLUSH_AUTO) {
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switch (l1tf_mitigation) {
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case L1TF_MITIGATION_OFF:
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l1tf = VMENTER_L1D_FLUSH_NEVER;
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break;
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case L1TF_MITIGATION_FLUSH_NOWARN:
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case L1TF_MITIGATION_FLUSH:
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case L1TF_MITIGATION_FLUSH_NOSMT:
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l1tf = VMENTER_L1D_FLUSH_COND;
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break;
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case L1TF_MITIGATION_FULL:
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case L1TF_MITIGATION_FULL_FORCE:
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l1tf = VMENTER_L1D_FLUSH_ALWAYS;
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break;
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}
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} else if (l1tf_mitigation == L1TF_MITIGATION_FULL_FORCE) {
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l1tf = VMENTER_L1D_FLUSH_ALWAYS;
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}
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if (l1tf != VMENTER_L1D_FLUSH_NEVER && !vmx_l1d_flush_pages &&
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!boot_cpu_has(X86_FEATURE_FLUSH_L1D)) {
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page = alloc_pages(GFP_KERNEL, L1D_CACHE_ORDER);
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@ -10571,19 +10584,36 @@ free_vcpu:
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return ERR_PTR(err);
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}
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#define L1TF_MSG "SMT enabled with L1TF CPU bug present. Refer to CVE-2018-3620 for details.\n"
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#define L1TF_MSG_SMT "L1TF CPU bug present and SMT on, data leak possible. See CVE-2018-3646 and https://www.kernel.org/doc/html/latest/admin-guide/l1tf.html for details.\n"
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#define L1TF_MSG_L1D "L1TF CPU bug present and virtualization mitigation disabled, data leak possible. See CVE-2018-3646 and https://www.kernel.org/doc/html/latest/admin-guide/l1tf.html for details.\n"
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static int vmx_vm_init(struct kvm *kvm)
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{
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if (!ple_gap)
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kvm->arch.pause_in_guest = true;
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if (boot_cpu_has(X86_BUG_L1TF) && cpu_smt_control == CPU_SMT_ENABLED) {
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if (nosmt) {
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pr_err(L1TF_MSG);
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return -EOPNOTSUPP;
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if (boot_cpu_has(X86_BUG_L1TF) && enable_ept) {
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switch (l1tf_mitigation) {
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case L1TF_MITIGATION_OFF:
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case L1TF_MITIGATION_FLUSH_NOWARN:
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/* 'I explicitly don't care' is set */
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break;
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case L1TF_MITIGATION_FLUSH:
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case L1TF_MITIGATION_FLUSH_NOSMT:
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case L1TF_MITIGATION_FULL:
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/*
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* Warn upon starting the first VM in a potentially
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* insecure environment.
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*/
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if (cpu_smt_control == CPU_SMT_ENABLED)
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pr_warn_once(L1TF_MSG_SMT);
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if (l1tf_vmx_mitigation == VMENTER_L1D_FLUSH_NEVER)
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pr_warn_once(L1TF_MSG_L1D);
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break;
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case L1TF_MITIGATION_FULL_FORCE:
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/* Flush is enforced */
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break;
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}
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pr_warn(L1TF_MSG);
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}
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return 0;
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}
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