intel_rapl: support 64 bit register
RAPL MMIO interface uses 64 bit registers, thus force use 64 bit register for all the RAPL code. Reviewed-by: Pandruvada, Srinivas <srinivas.pandruvada@intel.com> Tested-by: Pandruvada, Srinivas <srinivas.pandruvada@intel.com> Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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@ -689,7 +689,7 @@ static int rapl_read_data_raw(struct rapl_domain *rd,
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ra.mask = rp->mask;
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if (rd->rp->priv->read_raw(cpu, &ra)) {
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pr_debug("failed to read reg 0x%x on cpu %d\n", ra.reg, cpu);
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pr_debug("failed to read reg 0x%llx on cpu %d\n", ra.reg, cpu);
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return -EIO;
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}
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@ -749,7 +749,7 @@ static int rapl_check_unit_core(struct rapl_package *rp, int cpu)
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ra.reg = rp->priv->reg_unit;
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ra.mask = ~0;
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if (rp->priv->read_raw(cpu, &ra)) {
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pr_err("Failed to read power unit REG 0x%x on CPU %d, exit.\n",
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pr_err("Failed to read power unit REG 0x%llx on CPU %d, exit.\n",
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rp->priv->reg_unit, cpu);
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return -ENODEV;
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}
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@ -777,7 +777,7 @@ static int rapl_check_unit_atom(struct rapl_package *rp, int cpu)
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ra.reg = rp->priv->reg_unit;
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ra.mask = ~0;
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if (rp->priv->read_raw(cpu, &ra)) {
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pr_err("Failed to read power unit REG 0x%x on CPU %d, exit.\n",
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pr_err("Failed to read power unit REG 0x%llx on CPU %d, exit.\n",
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rp->priv->reg_unit, cpu);
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return -ENODEV;
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}
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@ -84,8 +84,10 @@ static int rapl_cpu_down_prep(unsigned int cpu)
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static int rapl_msr_read_raw(int cpu, struct reg_action *ra)
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{
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if (rdmsrl_safe_on_cpu(cpu, ra->reg, &ra->value)) {
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pr_debug("failed to read msr 0x%x on cpu %d\n", ra->reg, cpu);
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u32 msr = (u32)ra->reg;
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if (rdmsrl_safe_on_cpu(cpu, msr, &ra->value)) {
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pr_debug("failed to read msr 0x%x on cpu %d\n", msr, cpu);
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return -EIO;
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}
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ra->value &= ra->mask;
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@ -95,16 +97,17 @@ static int rapl_msr_read_raw(int cpu, struct reg_action *ra)
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static void rapl_msr_update_func(void *info)
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{
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struct reg_action *ra = info;
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u32 msr = (u32)ra->reg;
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u64 val;
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ra->err = rdmsrl_safe(ra->reg, &val);
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ra->err = rdmsrl_safe(msr, &val);
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if (ra->err)
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return;
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val &= ~ra->mask;
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val |= ra->value;
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ra->err = wrmsrl_safe(ra->reg, val);
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ra->err = wrmsrl_safe(msr, val);
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}
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static int rapl_msr_write_raw(int cpu, struct reg_action *ra)
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@ -78,7 +78,7 @@ struct rapl_package;
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struct rapl_domain {
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const char *name;
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enum rapl_domain_type id;
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int regs[RAPL_DOMAIN_REG_MAX];
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u64 regs[RAPL_DOMAIN_REG_MAX];
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struct powercap_zone power_zone;
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struct rapl_domain_data rdd;
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struct rapl_power_limit rpl[NR_POWER_LIMITS];
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@ -89,7 +89,7 @@ struct rapl_domain {
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};
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struct reg_action {
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u32 reg;
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u64 reg;
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u64 mask;
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u64 value;
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int err;
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@ -113,8 +113,8 @@ struct rapl_if_priv {
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struct powercap_control_type *control_type;
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struct rapl_domain *platform_rapl_domain;
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enum cpuhp_state pcap_rapl_online;
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u32 reg_unit;
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u32 regs[RAPL_DOMAIN_MAX][RAPL_DOMAIN_REG_MAX];
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u64 reg_unit;
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u64 regs[RAPL_DOMAIN_MAX][RAPL_DOMAIN_REG_MAX];
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int (*read_raw)(int cpu, struct reg_action *ra);
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int (*write_raw)(int cpu, struct reg_action *ra);
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};
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