phy: ti: gmii-sel: add support for am654x/j721e soc
TI AM654x/J721E SoCs have the same PHY interface selection mechanism for CPSWx subsystem as TI SoCs (AM3/4/5/DRA7), but registers and bit-fields placement is different. This patch adds corresponding support for TI AM654x/J721E SoCs PHY interface selection. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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74e29703a7
Коммит
d9aa91dfb2
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@ -170,6 +170,21 @@ struct phy_gmii_sel_soc_data phy_gmii_sel_soc_dm814 = {
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.regfields = phy_gmii_sel_fields_am33xx,
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.regfields = phy_gmii_sel_fields_am33xx,
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};
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};
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static const
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struct reg_field phy_gmii_sel_fields_am654[][PHY_GMII_SEL_LAST] = {
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{
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[PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x4040, 0, 1),
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[PHY_GMII_SEL_RGMII_ID_MODE] = REG_FIELD((~0), 0, 0),
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[PHY_GMII_SEL_RMII_IO_CLK_EN] = REG_FIELD((~0), 0, 0),
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},
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};
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static const
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struct phy_gmii_sel_soc_data phy_gmii_sel_soc_am654 = {
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.num_ports = 1,
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.regfields = phy_gmii_sel_fields_am654,
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};
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static const struct of_device_id phy_gmii_sel_id_table[] = {
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static const struct of_device_id phy_gmii_sel_id_table[] = {
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{
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{
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.compatible = "ti,am3352-phy-gmii-sel",
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.compatible = "ti,am3352-phy-gmii-sel",
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@ -187,6 +202,10 @@ static const struct of_device_id phy_gmii_sel_id_table[] = {
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.compatible = "ti,dm814-phy-gmii-sel",
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.compatible = "ti,dm814-phy-gmii-sel",
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.data = &phy_gmii_sel_soc_dm814,
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.data = &phy_gmii_sel_soc_dm814,
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},
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},
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{
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.compatible = "ti,am654-phy-gmii-sel",
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.data = &phy_gmii_sel_soc_am654,
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},
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{}
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{}
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};
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};
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MODULE_DEVICE_TABLE(of, phy_gmii_sel_id_table);
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MODULE_DEVICE_TABLE(of, phy_gmii_sel_id_table);
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