bpf: fix narrower loads on s390
The very first check in test_pkt_md_access is failing on s390, which
happens because loading a part of a struct __sk_buff field produces
an incorrect result.
The preprocessed code of the check is:
{
__u8 tmp = *((volatile __u8 *)&skb->len +
((sizeof(skb->len) - sizeof(__u8)) / sizeof(__u8)));
if (tmp != ((*(volatile __u32 *)&skb->len) & 0xFF)) return 2;
};
clang generates the following code for it:
0: 71 21 00 03 00 00 00 00 r2 = *(u8 *)(r1 + 3)
1: 61 31 00 00 00 00 00 00 r3 = *(u32 *)(r1 + 0)
2: 57 30 00 00 00 00 00 ff r3 &= 255
3: 5d 23 00 1d 00 00 00 00 if r2 != r3 goto +29 <LBB0_10>
Finally, verifier transforms it to:
0: (61) r2 = *(u32 *)(r1 +104)
1: (bc) w2 = w2
2: (74) w2 >>= 24
3: (bc) w2 = w2
4: (54) w2 &= 255
5: (bc) w2 = w2
The problem is that when verifier emits the code to replace a partial
load of a struct __sk_buff field (*(u8 *)(r1 + 3)) with a full load of
struct sk_buff field (*(u32 *)(r1 + 104)), an optional shift and a
bitwise AND, it assumes that the machine is little endian and
incorrectly decides to use a shift.
Adjust shift count calculation to account for endianness.
Fixes: 31fd85816d
("bpf: permits narrower load from bpf program context fields")
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
This commit is contained in:
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@ -24,6 +24,7 @@
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#include <net/sch_generic.h>
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#include <asm/byteorder.h>
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#include <uapi/linux/filter.h>
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#include <uapi/linux/bpf.h>
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@ -747,6 +748,18 @@ bpf_ctx_narrow_access_ok(u32 off, u32 size, u32 size_default)
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return size <= size_default && (size & (size - 1)) == 0;
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}
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static inline u8
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bpf_ctx_narrow_load_shift(u32 off, u32 size, u32 size_default)
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{
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u8 load_off = off & (size_default - 1);
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#ifdef __LITTLE_ENDIAN
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return load_off * 8;
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#else
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return (size_default - (load_off + size)) * 8;
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#endif
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}
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#define bpf_ctx_wide_access_ok(off, size, type, field) \
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(size == sizeof(__u64) && \
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off >= offsetof(type, field) && \
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@ -8616,8 +8616,8 @@ static int convert_ctx_accesses(struct bpf_verifier_env *env)
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}
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if (is_narrower_load && size < target_size) {
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u8 shift = (off & (size_default - 1)) * 8;
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u8 shift = bpf_ctx_narrow_load_shift(off, size,
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size_default);
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if (ctx_field_size <= 4) {
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if (shift)
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insn_buf[cnt++] = BPF_ALU32_IMM(BPF_RSH,
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