drm/i915/guc: Move doc near related definitions
After GuC code reorg some documentation was left in wrong place. Move it closer to corresponding definitions. v2: use consistent name for the GuC (Sagar) Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com> Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171016144724.17244-5-michal.wajdeczko@intel.com
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@ -33,6 +33,11 @@
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#include "i915_guc_reg.h"
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#include "i915_vma.h"
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/*
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* Top level structure of GuC. It handles firmware loading and manages client
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* pool and doorbells. intel_guc owns a i915_guc_client to replace the legacy
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* ExecList submission.
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*/
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struct intel_guc {
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struct intel_uc_fw fw;
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struct intel_guc_log log;
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@ -83,6 +88,12 @@ static inline void intel_guc_notify(struct intel_guc *guc)
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guc->notify(guc);
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}
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/*
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* GuC does not allow any gfx GGTT address that falls into range [0, WOPCM_TOP),
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* which is reserved for Boot ROM, SRAM and WOPCM. Currently this top address is
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* 512K. In order to exclude 0-512K address space from GGTT, all gfx objects
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* used by GuC is pinned with PIN_OFFSET_BIAS along with size of WOPCM.
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*/
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static inline u32 guc_ggtt_offset(struct i915_vma *vma)
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{
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u32 offset = i915_ggtt_offset(vma);
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@ -29,29 +29,6 @@
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#include "i915_drv.h"
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#include "intel_uc.h"
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/**
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* DOC: GuC-specific firmware loader
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*
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* intel_guc:
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* Top level structure of guc. It handles firmware loading and manages client
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* pool and doorbells. intel_guc owns a i915_guc_client to replace the legacy
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* ExecList submission.
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*
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* Firmware versioning:
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* The firmware build process will generate a version header file with major and
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* minor version defined. The versions are built into CSS header of firmware.
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* i915 kernel driver set the minimal firmware version required per platform.
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* The firmware installation package will install (symbolic link) proper version
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* of firmware.
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*
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* GuC address space:
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* GuC does not allow any gfx GGTT address that falls into range [0, WOPCM_TOP),
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* which is reserved for Boot ROM, SRAM and WOPCM. Currently this top address is
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* 512K. In order to exclude 0-512K address space from GGTT, all gfx objects
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* used by GuC is pinned with PIN_OFFSET_BIAS along with size of WOPCM.
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*
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*/
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#define SKL_FW_MAJOR 6
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#define SKL_FW_MINOR 1
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@ -50,6 +50,11 @@ struct intel_uc_fw {
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enum intel_uc_fw_status fetch_status;
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enum intel_uc_fw_status load_status;
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/*
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* The firmware build process will generate a version header file with major and
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* minor version defined. The versions are built into CSS header of firmware.
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* i915 kernel driver set the minimal firmware version required per platform.
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*/
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u16 major_ver_wanted;
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u16 minor_ver_wanted;
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u16 major_ver_found;
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