Merge branch '4.3-fixes' into mips-for-linux-next
This commit is contained in:
Коммит
da34232641
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@ -507,7 +507,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
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* @u: ...unless v is equal to u.
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*
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* Atomically adds @a to @v, so long as it was not @u.
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* Returns the old value of @v.
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* Returns true iff @v was not @u.
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*/
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static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
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{
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@ -84,6 +84,17 @@ void mips_cdmm_driver_unregister(struct mips_cdmm_driver *);
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module_driver(__mips_cdmm_driver, mips_cdmm_driver_register, \
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mips_cdmm_driver_unregister)
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/*
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* builtin_mips_cdmm_driver() - Helper macro for drivers that don't do anything
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* special in init and have no exit. This eliminates some boilerplate. Each
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* driver may only use this macro once, and calling it replaces device_initcall
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* (or in some cases, the legacy __initcall). This is meant to be a direct
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* parallel of module_mips_cdmm_driver() above but without the __exit stuff that
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* is not used for builtin cases.
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*/
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#define builtin_mips_cdmm_driver(__mips_cdmm_driver) \
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builtin_driver(__mips_cdmm_driver, mips_cdmm_driver_register)
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/* drivers/tty/mips_ejtag_fdc.c */
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#ifdef CONFIG_MIPS_EJTAG_FDC_EARLYCON
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@ -171,7 +171,6 @@ void __init check_wait(void)
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case CPU_BMIPS3300:
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case CPU_BMIPS4350:
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case CPU_BMIPS4380:
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case CPU_BMIPS5000:
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case CPU_CAVIUM_OCTEON:
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case CPU_CAVIUM_OCTEON_PLUS:
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case CPU_CAVIUM_OCTEON2:
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@ -182,7 +181,9 @@ void __init check_wait(void)
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case CPU_XLP:
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cpu_wait = r4k_wait;
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break;
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case CPU_BMIPS5000:
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cpu_wait = r4k_wait_irqoff;
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break;
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case CPU_RM7000:
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cpu_wait = rm7k_wait_irqoff;
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break;
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@ -1857,12 +1857,14 @@ void __noreturn nmi_exception_handler(struct pt_regs *regs)
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{
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char str[100];
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nmi_enter();
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raw_notifier_call_chain(&nmi_chain, 0, regs);
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bust_spinlocks(1);
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snprintf(str, 100, "CPU%d NMI taken, CP0_EPC=%lx\n",
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smp_processor_id(), regs->cp0_epc);
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regs->cp0_epc = read_c0_errorepc();
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die(str, regs);
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nmi_exit();
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}
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#define VECTORSPACING 0x100 /* for EI/VI mode */
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@ -17,7 +17,9 @@ OUTPUT_ARCH(mips)
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ENTRY(kernel_entry)
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PHDRS {
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text PT_LOAD FLAGS(7); /* RWX */
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#ifndef CONFIG_CAVIUM_OCTEON_SOC
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note PT_NOTE FLAGS(4); /* R__ */
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#endif /* CAVIUM_OCTEON_SOC */
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}
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#ifdef CONFIG_32BIT
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@ -71,7 +73,12 @@ SECTIONS
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__stop___dbe_table = .;
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}
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NOTES :text :note
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#ifdef CONFIG_CAVIUM_OCTEON_SOC
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#define NOTES_HEADER
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#else /* CONFIG_CAVIUM_OCTEON_SOC */
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#define NOTES_HEADER :note
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#endif /* CONFIG_CAVIUM_OCTEON_SOC */
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NOTES :text NOTES_HEADER
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.dummy : { *(.dummy) } :text
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_sdata = .; /* Start of data section */
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@ -186,6 +193,7 @@ SECTIONS
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DISCARDS
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/DISCARD/ : {
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/* ABI crap starts here */
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*(.MIPS.abiflags)
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*(.MIPS.options)
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*(.options)
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*(.pdr)
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