arm64: enforce x1|x2|x3 == 0 upon kernel entry as per boot protocol
According to the arm64 boot protocol, registers x1 to x3 should be zero upon kernel entry, and non-zero values are reserved for future use. This future use is going to be problematic if we never enforce the current rules, so start enforcing them now, by emitting a warning if non-zero values are detected. Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
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@ -233,7 +233,7 @@ section_table:
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#endif
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ENTRY(stext)
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mov x21, x0 // x21=FDT
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bl preserve_boot_args
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bl el2_setup // Drop to EL1, w20=cpu_boot_mode
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adrp x24, __PHYS_OFFSET
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bl set_cpu_boot_mode_flag
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@ -252,6 +252,23 @@ ENTRY(stext)
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b __cpu_setup // initialise processor
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ENDPROC(stext)
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/*
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* Preserve the arguments passed by the bootloader in x0 .. x3
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*/
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preserve_boot_args:
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mov x21, x0 // x21=FDT
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adr_l x0, boot_args // record the contents of
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stp x21, x1, [x0] // x0 .. x3 at kernel entry
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stp x2, x3, [x0, #16]
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dmb sy // needed before dc ivac with
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// MMU off
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add x1, x0, #0x20 // 4 x 8 bytes
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b __inval_cache_range // tail call
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ENDPROC(preserve_boot_args)
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/*
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* Determine validity of the x21 FDT pointer.
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* The dtb must be 8-byte aligned and live in the first 512M of memory.
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@ -115,6 +115,11 @@ void __init early_print(const char *str, ...)
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printk("%s", buf);
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}
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/*
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* The recorded values of x0 .. x3 upon kernel entry.
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*/
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u64 __cacheline_aligned boot_args[4];
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void __init smp_setup_processor_id(void)
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{
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u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
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@ -412,6 +417,12 @@ void __init setup_arch(char **cmdline_p)
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conswitchp = &dummy_con;
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#endif
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#endif
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if (boot_args[1] || boot_args[2] || boot_args[3]) {
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pr_err("WARNING: x1-x3 nonzero in violation of boot protocol:\n"
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"\tx1: %016llx\n\tx2: %016llx\n\tx3: %016llx\n"
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"This indicates a broken bootloader or old kernel\n",
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boot_args[1], boot_args[2], boot_args[3]);
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}
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}
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static int __init arm64_device_init(void)
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