drm/amdgpu/gfx8: Tidy up various PG helpers
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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216cde6008
Коммит
dad4acc896
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@ -5257,20 +5257,15 @@ static void gfx_v8_0_enable_gfx_static_mg_power_gating(struct amdgpu_device *ade
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enable ?
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enable ?
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AMD_PG_STATE_GATE : AMD_PG_STATE_UNGATE);
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AMD_PG_STATE_GATE : AMD_PG_STATE_UNGATE);
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if (enable) {
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temp = data = RREG32(mmRLC_PG_CNTL);
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/* Enable static MGPG */
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/* Enable static MGPG */
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temp = data = RREG32(mmRLC_PG_CNTL);
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if (enable)
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data |= RLC_PG_CNTL__STATIC_PER_CU_PG_ENABLE_MASK;
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data |= RLC_PG_CNTL__STATIC_PER_CU_PG_ENABLE_MASK;
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else
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if (temp != data)
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WREG32(mmRLC_PG_CNTL, data);
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} else {
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temp = data = RREG32(mmRLC_PG_CNTL);
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data &= ~RLC_PG_CNTL__STATIC_PER_CU_PG_ENABLE_MASK;
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data &= ~RLC_PG_CNTL__STATIC_PER_CU_PG_ENABLE_MASK;
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if (temp != data)
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if (temp != data)
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WREG32(mmRLC_PG_CNTL, data);
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WREG32(mmRLC_PG_CNTL, data);
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}
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}
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}
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static void gfx_v8_0_enable_gfx_dynamic_mg_power_gating(struct amdgpu_device *adev,
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static void gfx_v8_0_enable_gfx_dynamic_mg_power_gating(struct amdgpu_device *adev,
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@ -5278,20 +5273,15 @@ static void gfx_v8_0_enable_gfx_dynamic_mg_power_gating(struct amdgpu_device *ad
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{
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{
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uint32_t data, temp;
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uint32_t data, temp;
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if (enable) {
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temp = data = RREG32(mmRLC_PG_CNTL);
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/* Enable dynamic MGPG */
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/* Enable dynamic MGPG */
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temp = data = RREG32(mmRLC_PG_CNTL);
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if (enable)
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data |= RLC_PG_CNTL__DYN_PER_CU_PG_ENABLE_MASK;
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data |= RLC_PG_CNTL__DYN_PER_CU_PG_ENABLE_MASK;
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else
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if (temp != data)
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WREG32(mmRLC_PG_CNTL, data);
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} else {
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temp = data = RREG32(mmRLC_PG_CNTL);
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data &= ~RLC_PG_CNTL__DYN_PER_CU_PG_ENABLE_MASK;
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data &= ~RLC_PG_CNTL__DYN_PER_CU_PG_ENABLE_MASK;
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if (temp != data)
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if (temp != data)
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WREG32(mmRLC_PG_CNTL, data);
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WREG32(mmRLC_PG_CNTL, data);
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}
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}
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}
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static void polaris11_enable_gfx_quick_mg_power_gating(struct amdgpu_device *adev,
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static void polaris11_enable_gfx_quick_mg_power_gating(struct amdgpu_device *adev,
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@ -5299,20 +5289,15 @@ static void polaris11_enable_gfx_quick_mg_power_gating(struct amdgpu_device *ade
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{
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{
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uint32_t data, temp;
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uint32_t data, temp;
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if (enable) {
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temp = data = RREG32(mmRLC_PG_CNTL);
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/* Enable quick PG */
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/* Enable quick PG */
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temp = data = RREG32(mmRLC_PG_CNTL);
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if (enable)
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data |= 0x100000;
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data |= 0x100000;
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else
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if (temp != data)
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WREG32(mmRLC_PG_CNTL, data);
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} else {
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temp = data = RREG32(mmRLC_PG_CNTL);
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data &= ~0x100000;
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data &= ~0x100000;
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if (temp != data)
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if (temp != data)
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WREG32(mmRLC_PG_CNTL, data);
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WREG32(mmRLC_PG_CNTL, data);
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}
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}
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}
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static void cz_enable_gfx_cg_power_gating(struct amdgpu_device *adev,
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static void cz_enable_gfx_cg_power_gating(struct amdgpu_device *adev,
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