crypto: caam - add support for rfc3686 with authenc md5, sha1 and sha2
Add support for AES Counter Mode (CTR) compliant with RFC3686 to be used along with authenc algorithms (md5, sha1, sha224, sha256, sha384, sha512) as one-shot aead algorithms. Signed-off-by: Catalin Vasile <catalin.vasile@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Catalin Vasile
Herbert Xu
Родитель
a5f57cffce
Коммит
daebc46585
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@ -60,6 +60,7 @@
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#define CAAM_CRA_PRIORITY 3000
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/* max key is sum of AES_MAX_KEY_SIZE, max split key size */
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#define CAAM_MAX_KEY_SIZE (AES_MAX_KEY_SIZE + \
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CTR_RFC3686_NONCE_SIZE + \
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SHA512_DIGEST_SIZE * 2)
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/* max IV is max of AES_BLOCK_SIZE, DES3_EDE_BLOCK_SIZE */
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#define CAAM_MAX_IV_LENGTH 16
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@ -70,6 +71,9 @@
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#define DESC_AEAD_DEC_LEN (DESC_AEAD_BASE + 18 * CAAM_CMD_SZ)
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#define DESC_AEAD_GIVENC_LEN (DESC_AEAD_ENC_LEN + 7 * CAAM_CMD_SZ)
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/* Note: Nonce is counted in enckeylen */
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#define DESC_AEAD_CTR_RFC3686_LEN (6 * CAAM_CMD_SZ)
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#define DESC_AEAD_NULL_BASE (3 * CAAM_CMD_SZ)
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#define DESC_AEAD_NULL_ENC_LEN (DESC_AEAD_NULL_BASE + 14 * CAAM_CMD_SZ)
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#define DESC_AEAD_NULL_DEC_LEN (DESC_AEAD_NULL_BASE + 17 * CAAM_CMD_SZ)
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@ -142,11 +146,13 @@ static inline void aead_append_src_dst(u32 *desc, u32 msg_type)
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/*
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* For aead encrypt and decrypt, read iv for both classes
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*/
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static inline void aead_append_ld_iv(u32 *desc, int ivsize)
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static inline void aead_append_ld_iv(u32 *desc, int ivsize, int ivoffset)
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{
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append_cmd(desc, CMD_SEQ_LOAD | LDST_SRCDST_BYTE_CONTEXT |
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LDST_CLASS_1_CCB | ivsize);
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append_move(desc, MOVE_SRC_CLASS1CTX | MOVE_DEST_CLASS2INFIFO | ivsize);
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append_seq_load(desc, ivsize, LDST_CLASS_1_CCB |
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LDST_SRCDST_BYTE_CONTEXT |
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(ivoffset << LDST_OFFSET_SHIFT));
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append_move(desc, MOVE_SRC_CLASS1CTX | MOVE_DEST_CLASS2INFIFO |
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(ivoffset << MOVE_OFFSET_SHIFT) | ivsize);
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}
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/*
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@ -192,35 +198,60 @@ struct caam_ctx {
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};
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static void append_key_aead(u32 *desc, struct caam_ctx *ctx,
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int keys_fit_inline)
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int keys_fit_inline, bool is_rfc3686)
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{
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u32 *nonce;
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unsigned int enckeylen = ctx->enckeylen;
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/*
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* RFC3686 specific:
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* | ctx->key = {AUTH_KEY, ENC_KEY, NONCE}
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* | enckeylen = encryption key size + nonce size
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*/
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if (is_rfc3686)
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enckeylen -= CTR_RFC3686_NONCE_SIZE;
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if (keys_fit_inline) {
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append_key_as_imm(desc, ctx->key, ctx->split_key_pad_len,
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ctx->split_key_len, CLASS_2 |
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KEY_DEST_MDHA_SPLIT | KEY_ENC);
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append_key_as_imm(desc, (void *)ctx->key +
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ctx->split_key_pad_len, ctx->enckeylen,
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ctx->enckeylen, CLASS_1 | KEY_DEST_CLASS_REG);
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ctx->split_key_pad_len, enckeylen,
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enckeylen, CLASS_1 | KEY_DEST_CLASS_REG);
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} else {
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append_key(desc, ctx->key_dma, ctx->split_key_len, CLASS_2 |
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KEY_DEST_MDHA_SPLIT | KEY_ENC);
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append_key(desc, ctx->key_dma + ctx->split_key_pad_len,
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ctx->enckeylen, CLASS_1 | KEY_DEST_CLASS_REG);
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enckeylen, CLASS_1 | KEY_DEST_CLASS_REG);
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}
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/* Load Counter into CONTEXT1 reg */
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if (is_rfc3686) {
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nonce = (u32 *)((void *)ctx->key + ctx->split_key_pad_len +
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enckeylen);
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append_load_imm_u32(desc, *nonce, LDST_CLASS_IND_CCB |
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LDST_SRCDST_BYTE_OUTFIFO | LDST_IMM);
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append_move(desc,
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MOVE_SRC_OUTFIFO |
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MOVE_DEST_CLASS1CTX |
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(16 << MOVE_OFFSET_SHIFT) |
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(CTR_RFC3686_NONCE_SIZE << MOVE_LEN_SHIFT));
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}
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}
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static void init_sh_desc_key_aead(u32 *desc, struct caam_ctx *ctx,
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int keys_fit_inline)
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int keys_fit_inline, bool is_rfc3686)
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{
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u32 *key_jump_cmd;
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init_sh_desc(desc, HDR_SHARE_SERIAL);
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/* Note: Context registers are saved. */
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init_sh_desc(desc, HDR_SHARE_SERIAL | HDR_SAVECTX);
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/* Skip if already shared */
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key_jump_cmd = append_jump(desc, JUMP_JSL | JUMP_TEST_ALL |
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JUMP_COND_SHRD);
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append_key_aead(desc, ctx, keys_fit_inline);
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append_key_aead(desc, ctx, keys_fit_inline, is_rfc3686);
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set_jump_tgt_here(desc, key_jump_cmd);
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}
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@ -420,10 +451,17 @@ static int aead_set_sh_desc(struct crypto_aead *aead)
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{
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struct aead_tfm *tfm = &aead->base.crt_aead;
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struct caam_ctx *ctx = crypto_aead_ctx(aead);
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struct crypto_tfm *ctfm = crypto_aead_tfm(aead);
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const char *alg_name = crypto_tfm_alg_name(ctfm);
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struct device *jrdev = ctx->jrdev;
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bool keys_fit_inline = false;
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bool keys_fit_inline;
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u32 geniv, moveiv;
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u32 ctx1_iv_off = 0;
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u32 *desc;
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const bool ctr_mode = ((ctx->class1_alg_type & OP_ALG_AAI_MASK) ==
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OP_ALG_AAI_CTR_MOD128);
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const bool is_rfc3686 = (ctr_mode &&
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(strstr(alg_name, "rfc3686") != NULL));
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if (!ctx->authsize)
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return 0;
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@ -432,19 +470,37 @@ static int aead_set_sh_desc(struct crypto_aead *aead)
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if (!ctx->enckeylen)
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return aead_null_set_sh_desc(aead);
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/*
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* AES-CTR needs to load IV in CONTEXT1 reg
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* at an offset of 128bits (16bytes)
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* CONTEXT1[255:128] = IV
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*/
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if (ctr_mode)
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ctx1_iv_off = 16;
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/*
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* RFC3686 specific:
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* CONTEXT1[255:128] = {NONCE, IV, COUNTER}
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*/
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if (is_rfc3686)
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ctx1_iv_off = 16 + CTR_RFC3686_NONCE_SIZE;
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/*
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* Job Descriptor and Shared Descriptors
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* must all fit into the 64-word Descriptor h/w Buffer
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*/
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keys_fit_inline = false;
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if (DESC_AEAD_ENC_LEN + DESC_JOB_IO_LEN +
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ctx->split_key_pad_len + ctx->enckeylen <=
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ctx->split_key_pad_len + ctx->enckeylen +
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(is_rfc3686 ? DESC_AEAD_CTR_RFC3686_LEN : 0) <=
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CAAM_DESC_BYTES_MAX)
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keys_fit_inline = true;
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/* aead_encrypt shared descriptor */
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desc = ctx->sh_desc_enc;
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init_sh_desc_key_aead(desc, ctx, keys_fit_inline);
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/* Note: Context registers are saved. */
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init_sh_desc_key_aead(desc, ctx, keys_fit_inline, is_rfc3686);
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/* Class 2 operation */
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append_operation(desc, ctx->class2_alg_type |
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@ -462,7 +518,15 @@ static int aead_set_sh_desc(struct crypto_aead *aead)
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/* read assoc before reading payload */
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append_seq_fifo_load(desc, 0, FIFOLD_CLASS_CLASS2 | FIFOLD_TYPE_MSG |
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KEY_VLF);
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aead_append_ld_iv(desc, tfm->ivsize);
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aead_append_ld_iv(desc, tfm->ivsize, ctx1_iv_off);
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/* Load Counter into CONTEXT1 reg */
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if (is_rfc3686)
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append_load_imm_u32(desc, be32_to_cpu(1), LDST_IMM |
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LDST_CLASS_1_CCB |
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LDST_SRCDST_BYTE_CONTEXT |
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((ctx1_iv_off + CTR_RFC3686_IV_SIZE) <<
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LDST_OFFSET_SHIFT));
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/* Class 1 operation */
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append_operation(desc, ctx->class1_alg_type |
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@ -496,14 +560,16 @@ static int aead_set_sh_desc(struct crypto_aead *aead)
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*/
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keys_fit_inline = false;
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if (DESC_AEAD_DEC_LEN + DESC_JOB_IO_LEN +
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ctx->split_key_pad_len + ctx->enckeylen <=
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ctx->split_key_pad_len + ctx->enckeylen +
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(is_rfc3686 ? DESC_AEAD_CTR_RFC3686_LEN : 0) <=
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CAAM_DESC_BYTES_MAX)
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keys_fit_inline = true;
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/* aead_decrypt shared descriptor */
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desc = ctx->sh_desc_dec;
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init_sh_desc_key_aead(desc, ctx, keys_fit_inline);
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/* Note: Context registers are saved. */
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init_sh_desc_key_aead(desc, ctx, keys_fit_inline, is_rfc3686);
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/* Class 2 operation */
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append_operation(desc, ctx->class2_alg_type |
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@ -520,9 +586,22 @@ static int aead_set_sh_desc(struct crypto_aead *aead)
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append_seq_fifo_load(desc, 0, FIFOLD_CLASS_CLASS2 | FIFOLD_TYPE_MSG |
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KEY_VLF);
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aead_append_ld_iv(desc, tfm->ivsize);
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aead_append_ld_iv(desc, tfm->ivsize, ctx1_iv_off);
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append_dec_op1(desc, ctx->class1_alg_type);
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/* Load Counter into CONTEXT1 reg */
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if (is_rfc3686)
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append_load_imm_u32(desc, be32_to_cpu(1), LDST_IMM |
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LDST_CLASS_1_CCB |
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LDST_SRCDST_BYTE_CONTEXT |
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((ctx1_iv_off + CTR_RFC3686_IV_SIZE) <<
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LDST_OFFSET_SHIFT));
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/* Choose operation */
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if (ctr_mode)
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append_operation(desc, ctx->class1_alg_type |
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OP_ALG_AS_INITFINAL | OP_ALG_DECRYPT);
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else
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append_dec_op1(desc, ctx->class1_alg_type);
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/* Read and write cryptlen bytes */
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append_math_add(desc, VARSEQINLEN, ZERO, REG2, CAAM_CMD_SZ);
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@ -552,14 +631,16 @@ static int aead_set_sh_desc(struct crypto_aead *aead)
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*/
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keys_fit_inline = false;
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if (DESC_AEAD_GIVENC_LEN + DESC_JOB_IO_LEN +
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ctx->split_key_pad_len + ctx->enckeylen <=
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ctx->split_key_pad_len + ctx->enckeylen +
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(is_rfc3686 ? DESC_AEAD_CTR_RFC3686_LEN : 0) <=
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CAAM_DESC_BYTES_MAX)
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keys_fit_inline = true;
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/* aead_givencrypt shared descriptor */
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desc = ctx->sh_desc_givenc;
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init_sh_desc_key_aead(desc, ctx, keys_fit_inline);
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/* Note: Context registers are saved. */
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init_sh_desc_key_aead(desc, ctx, keys_fit_inline, is_rfc3686);
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/* Generate IV */
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geniv = NFIFOENTRY_STYPE_PAD | NFIFOENTRY_DEST_DECO |
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@ -568,13 +649,16 @@ static int aead_set_sh_desc(struct crypto_aead *aead)
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append_load_imm_u32(desc, geniv, LDST_CLASS_IND_CCB |
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LDST_SRCDST_WORD_INFO_FIFO | LDST_IMM);
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append_cmd(desc, CMD_LOAD | DISABLE_AUTO_INFO_FIFO);
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append_move(desc, MOVE_SRC_INFIFO |
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MOVE_DEST_CLASS1CTX | (tfm->ivsize << MOVE_LEN_SHIFT));
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append_move(desc, MOVE_WAITCOMP |
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MOVE_SRC_INFIFO | MOVE_DEST_CLASS1CTX |
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(ctx1_iv_off << MOVE_OFFSET_SHIFT) |
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(tfm->ivsize << MOVE_LEN_SHIFT));
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append_cmd(desc, CMD_LOAD | ENABLE_AUTO_INFO_FIFO);
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/* Copy IV to class 1 context */
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append_move(desc, MOVE_SRC_CLASS1CTX |
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MOVE_DEST_OUTFIFO | (tfm->ivsize << MOVE_LEN_SHIFT));
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append_move(desc, MOVE_SRC_CLASS1CTX | MOVE_DEST_OUTFIFO |
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(ctx1_iv_off << MOVE_OFFSET_SHIFT) |
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(tfm->ivsize << MOVE_LEN_SHIFT));
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/* Return to encryption */
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append_operation(desc, ctx->class2_alg_type |
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@ -590,7 +674,7 @@ static int aead_set_sh_desc(struct crypto_aead *aead)
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append_seq_fifo_load(desc, 0, FIFOLD_CLASS_CLASS2 | FIFOLD_TYPE_MSG |
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KEY_VLF);
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/* Copy iv from class 1 ctx to class 2 fifo*/
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/* Copy iv from outfifo to class 2 fifo */
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moveiv = NFIFOENTRY_STYPE_OFIFO | NFIFOENTRY_DEST_CLASS2 |
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NFIFOENTRY_DTYPE_MSG | (tfm->ivsize << NFIFOENTRY_DLEN_SHIFT);
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append_load_imm_u32(desc, moveiv, LDST_CLASS_IND_CCB |
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@ -598,6 +682,14 @@ static int aead_set_sh_desc(struct crypto_aead *aead)
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append_load_imm_u32(desc, tfm->ivsize, LDST_CLASS_2_CCB |
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LDST_SRCDST_WORD_DATASZ_REG | LDST_IMM);
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/* Load Counter into CONTEXT1 reg */
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if (is_rfc3686)
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append_load_imm_u32(desc, be32_to_cpu(1), LDST_IMM |
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LDST_CLASS_1_CCB |
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LDST_SRCDST_BYTE_CONTEXT |
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((ctx1_iv_off + CTR_RFC3686_IV_SIZE) <<
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LDST_OFFSET_SHIFT));
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/* Class 1 operation */
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append_operation(desc, ctx->class1_alg_type |
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OP_ALG_AS_INITFINAL | OP_ALG_ENCRYPT);
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@ -3502,6 +3594,124 @@ static struct caam_alg_template driver_algs[] = {
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OP_ALG_AAI_HMAC_PRECOMP,
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.alg_op = OP_ALG_ALGSEL_SHA512 | OP_ALG_AAI_HMAC,
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},
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{
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.name = "authenc(hmac(md5),rfc3686(ctr(aes)))",
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.driver_name = "authenc-hmac-md5-rfc3686-ctr-aes-caam",
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.blocksize = 1,
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.type = CRYPTO_ALG_TYPE_AEAD,
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.template_aead = {
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.setkey = aead_setkey,
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.setauthsize = aead_setauthsize,
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.encrypt = aead_encrypt,
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.decrypt = aead_decrypt,
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.givencrypt = aead_givencrypt,
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.geniv = "<built-in>",
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.ivsize = CTR_RFC3686_IV_SIZE,
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.maxauthsize = MD5_DIGEST_SIZE,
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},
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.class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CTR_MOD128,
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.class2_alg_type = OP_ALG_ALGSEL_MD5 | OP_ALG_AAI_HMAC_PRECOMP,
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.alg_op = OP_ALG_ALGSEL_MD5 | OP_ALG_AAI_HMAC,
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},
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{
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.name = "authenc(hmac(sha1),rfc3686(ctr(aes)))",
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.driver_name = "authenc-hmac-sha1-rfc3686-ctr-aes-caam",
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.blocksize = 1,
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.type = CRYPTO_ALG_TYPE_AEAD,
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.template_aead = {
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.setkey = aead_setkey,
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.setauthsize = aead_setauthsize,
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.encrypt = aead_encrypt,
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.decrypt = aead_decrypt,
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.givencrypt = aead_givencrypt,
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.geniv = "<built-in>",
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.ivsize = CTR_RFC3686_IV_SIZE,
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.maxauthsize = SHA1_DIGEST_SIZE,
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},
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.class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CTR_MOD128,
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.class2_alg_type = OP_ALG_ALGSEL_SHA1 | OP_ALG_AAI_HMAC_PRECOMP,
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.alg_op = OP_ALG_ALGSEL_SHA1 | OP_ALG_AAI_HMAC,
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},
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{
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.name = "authenc(hmac(sha224),rfc3686(ctr(aes)))",
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.driver_name = "authenc-hmac-sha224-rfc3686-ctr-aes-caam",
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.blocksize = 1,
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.type = CRYPTO_ALG_TYPE_AEAD,
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.template_aead = {
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.setkey = aead_setkey,
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.setauthsize = aead_setauthsize,
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.encrypt = aead_encrypt,
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.decrypt = aead_decrypt,
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.givencrypt = aead_givencrypt,
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.geniv = "<built-in>",
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.ivsize = CTR_RFC3686_IV_SIZE,
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.maxauthsize = SHA224_DIGEST_SIZE,
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},
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.class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CTR_MOD128,
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.class2_alg_type = OP_ALG_ALGSEL_SHA224 |
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OP_ALG_AAI_HMAC_PRECOMP,
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.alg_op = OP_ALG_ALGSEL_SHA224 | OP_ALG_AAI_HMAC,
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},
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{
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.name = "authenc(hmac(sha256),rfc3686(ctr(aes)))",
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.driver_name = "authenc-hmac-sha256-rfc3686-ctr-aes-caam",
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.blocksize = 1,
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.type = CRYPTO_ALG_TYPE_AEAD,
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.template_aead = {
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.setkey = aead_setkey,
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.setauthsize = aead_setauthsize,
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.encrypt = aead_encrypt,
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.decrypt = aead_decrypt,
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.givencrypt = aead_givencrypt,
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.geniv = "<built-in>",
|
||||
.ivsize = CTR_RFC3686_IV_SIZE,
|
||||
.maxauthsize = SHA256_DIGEST_SIZE,
|
||||
},
|
||||
.class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CTR_MOD128,
|
||||
.class2_alg_type = OP_ALG_ALGSEL_SHA256 |
|
||||
OP_ALG_AAI_HMAC_PRECOMP,
|
||||
.alg_op = OP_ALG_ALGSEL_SHA256 | OP_ALG_AAI_HMAC,
|
||||
},
|
||||
{
|
||||
.name = "authenc(hmac(sha384),rfc3686(ctr(aes)))",
|
||||
.driver_name = "authenc-hmac-sha384-rfc3686-ctr-aes-caam",
|
||||
.blocksize = 1,
|
||||
.type = CRYPTO_ALG_TYPE_AEAD,
|
||||
.template_aead = {
|
||||
.setkey = aead_setkey,
|
||||
.setauthsize = aead_setauthsize,
|
||||
.encrypt = aead_encrypt,
|
||||
.decrypt = aead_decrypt,
|
||||
.givencrypt = aead_givencrypt,
|
||||
.geniv = "<built-in>",
|
||||
.ivsize = CTR_RFC3686_IV_SIZE,
|
||||
.maxauthsize = SHA384_DIGEST_SIZE,
|
||||
},
|
||||
.class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CTR_MOD128,
|
||||
.class2_alg_type = OP_ALG_ALGSEL_SHA384 |
|
||||
OP_ALG_AAI_HMAC_PRECOMP,
|
||||
.alg_op = OP_ALG_ALGSEL_SHA384 | OP_ALG_AAI_HMAC,
|
||||
},
|
||||
{
|
||||
.name = "authenc(hmac(sha512),rfc3686(ctr(aes)))",
|
||||
.driver_name = "authenc-hmac-sha512-rfc3686-ctr-aes-caam",
|
||||
.blocksize = 1,
|
||||
.type = CRYPTO_ALG_TYPE_AEAD,
|
||||
.template_aead = {
|
||||
.setkey = aead_setkey,
|
||||
.setauthsize = aead_setauthsize,
|
||||
.encrypt = aead_encrypt,
|
||||
.decrypt = aead_decrypt,
|
||||
.givencrypt = aead_givencrypt,
|
||||
.geniv = "<built-in>",
|
||||
.ivsize = CTR_RFC3686_IV_SIZE,
|
||||
.maxauthsize = SHA512_DIGEST_SIZE,
|
||||
},
|
||||
.class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CTR_MOD128,
|
||||
.class2_alg_type = OP_ALG_ALGSEL_SHA512 |
|
||||
OP_ALG_AAI_HMAC_PRECOMP,
|
||||
.alg_op = OP_ALG_ALGSEL_SHA512 | OP_ALG_AAI_HMAC,
|
||||
},
|
||||
{
|
||||
.name = "rfc4106(gcm(aes))",
|
||||
.driver_name = "rfc4106-gcm-aes-caam",
|
||||
|
|
|
|||
Загрузка…
Ссылка в новой задаче