mmc: mmci: expand startbiterr to irqmask and error check
All variants don't pretend to have a startbiterr. -While data error check, if status register return an error (like MCI_DATACRCFAIL) we must avoid to check MCI_STARTBITERR (if not desired). -expand start_err to MCI_IRQENABLE to avoid to set this bit by default. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -1042,14 +1042,18 @@ static void
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mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
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unsigned int status)
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{
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unsigned int status_err;
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/* Make sure we have data to handle */
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if (!data)
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return;
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/* First check for errors */
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if (status & (MCI_DATACRCFAIL | MCI_DATATIMEOUT |
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host->variant->start_err |
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MCI_TXUNDERRUN | MCI_RXOVERRUN)) {
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status_err = status & (host->variant->start_err |
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MCI_DATACRCFAIL | MCI_DATATIMEOUT |
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MCI_TXUNDERRUN | MCI_RXOVERRUN);
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if (status_err) {
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u32 remain, success;
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/* Terminate the DMA transfer */
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@ -1066,18 +1070,18 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
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success = data->blksz * data->blocks - remain;
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dev_dbg(mmc_dev(host->mmc), "MCI ERROR IRQ, status 0x%08x at 0x%08x\n",
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status, success);
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if (status & MCI_DATACRCFAIL) {
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status_err, success);
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if (status_err & MCI_DATACRCFAIL) {
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/* Last block was not successful */
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success -= 1;
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data->error = -EILSEQ;
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} else if (status & MCI_DATATIMEOUT) {
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} else if (status_err & MCI_DATATIMEOUT) {
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data->error = -ETIMEDOUT;
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} else if (status & MCI_STARTBITERR) {
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} else if (status_err & MCI_STARTBITERR) {
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data->error = -ECOMM;
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} else if (status & MCI_TXUNDERRUN) {
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} else if (status_err & MCI_TXUNDERRUN) {
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data->error = -EIO;
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} else if (status & MCI_RXOVERRUN) {
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} else if (status_err & MCI_RXOVERRUN) {
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if (success > host->variant->fifosize)
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success -= host->variant->fifosize;
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else
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@ -1918,7 +1922,7 @@ static int mmci_probe(struct amba_device *dev,
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goto clk_disable;
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}
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writel(MCI_IRQENABLE, host->base + MMCIMASK0);
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writel(MCI_IRQENABLE | variant->start_err, host->base + MMCIMASK0);
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amba_set_drvdata(dev, mmc);
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@ -2005,7 +2009,8 @@ static void mmci_restore(struct mmci_host *host)
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writel(host->datactrl_reg, host->base + MMCIDATACTRL);
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writel(host->pwr_reg, host->base + MMCIPOWER);
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}
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writel(MCI_IRQENABLE, host->base + MMCIMASK0);
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writel(MCI_IRQENABLE | host->variant->start_err,
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host->base + MMCIMASK0);
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mmci_reg_delay(host);
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spin_unlock_irqrestore(&host->lock, flags);
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@ -181,9 +181,9 @@
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#define MMCIFIFO 0x080 /* to 0x0bc */
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#define MCI_IRQENABLE \
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(MCI_CMDCRCFAILMASK|MCI_DATACRCFAILMASK|MCI_CMDTIMEOUTMASK| \
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MCI_DATATIMEOUTMASK|MCI_TXUNDERRUNMASK|MCI_RXOVERRUNMASK| \
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MCI_CMDRESPENDMASK|MCI_CMDSENTMASK|MCI_STARTBITERRMASK)
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(MCI_CMDCRCFAILMASK | MCI_DATACRCFAILMASK | MCI_CMDTIMEOUTMASK | \
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MCI_DATATIMEOUTMASK | MCI_TXUNDERRUNMASK | MCI_RXOVERRUNMASK | \
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MCI_CMDRESPENDMASK | MCI_CMDSENTMASK)
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/* These interrupts are directed to IRQ1 when two IRQ lines are available */
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#define MCI_IRQ1MASK \
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