mfd: sta2x11-mfd: Add scr (otp registers) platform driver
Signed-off-by: Davide Ciminaghi <ciminaghi@gnudd.com> Acked-by: Alessandro Rubini <rubini@gnudd.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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e885ba2980
Коммит
dba6c1aeea
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@ -175,10 +175,16 @@ static void sta2x11_regmap_unlock(void *__lock)
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spin_unlock(lock);
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}
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/* OTP (one time programmable registers do not require locking */
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static void sta2x11_regmap_nolock(void *__lock)
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{
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}
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static const char *sta2x11_mfd_names[sta2x11_n_mfd_plat_devs] = {
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[sta2x11_sctl] = STA2X11_MFD_SCTL_NAME,
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[sta2x11_apbreg] = STA2X11_MFD_APBREG_NAME,
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[sta2x11_apb_soc_regs] = STA2X11_MFD_APB_SOC_REGS_NAME,
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[sta2x11_scr] = STA2X11_MFD_SCR_NAME,
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};
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static bool sta2x11_sctl_writeable_reg(struct device *dev, unsigned int reg)
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@ -196,6 +202,28 @@ static struct regmap_config sta2x11_sctl_regmap_config = {
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.writeable_reg = sta2x11_sctl_writeable_reg,
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};
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static bool sta2x11_scr_readable_reg(struct device *dev, unsigned int reg)
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{
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return (reg == STA2X11_SECR_CR) ||
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__reg_within_range(reg, STA2X11_SECR_FVR0, STA2X11_SECR_FVR1);
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}
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static bool sta2x11_scr_writeable_reg(struct device *dev, unsigned int reg)
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{
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return false;
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}
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static struct regmap_config sta2x11_scr_regmap_config = {
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.reg_bits = 32,
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.reg_stride = 4,
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.val_bits = 32,
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.lock = sta2x11_regmap_nolock,
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.unlock = sta2x11_regmap_nolock,
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.max_register = STA2X11_SECR_FVR1,
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.readable_reg = sta2x11_scr_readable_reg,
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.writeable_reg = sta2x11_scr_writeable_reg,
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};
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static bool sta2x11_apbreg_readable_reg(struct device *dev, unsigned int reg)
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{
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/* Two blocks (CAN and MLB, SARAC) 0x100 bytes apart */
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@ -279,9 +307,10 @@ sta2x11_mfd_regmap_configs[sta2x11_n_mfd_plat_devs] = {
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[sta2x11_sctl] = &sta2x11_sctl_regmap_config,
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[sta2x11_apbreg] = &sta2x11_apbreg_regmap_config,
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[sta2x11_apb_soc_regs] = &sta2x11_apb_soc_regs_regmap_config,
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[sta2x11_scr] = &sta2x11_scr_regmap_config,
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};
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/* Probe for the three platform devices */
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/* Probe for the four platform devices */
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static int sta2x11_mfd_platform_probe(struct platform_device *dev,
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enum sta2x11_mfd_plat_dev index)
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@ -339,6 +368,11 @@ static int sta2x11_apb_soc_regs_probe(struct platform_device *dev)
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return sta2x11_mfd_platform_probe(dev, sta2x11_apb_soc_regs);
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}
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static int sta2x11_scr_probe(struct platform_device *dev)
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{
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return sta2x11_mfd_platform_probe(dev, sta2x11_scr);
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}
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/* The three platform drivers */
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static struct platform_driver sta2x11_sctl_platform_driver = {
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.driver = {
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@ -382,6 +416,21 @@ static int __init sta2x11_apb_soc_regs_init(void)
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return platform_driver_register(&sta2x11_apb_soc_regs_platform_driver);
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}
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static struct platform_driver sta2x11_scr_platform_driver = {
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.driver = {
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.name = STA2X11_MFD_SCR_NAME,
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.owner = THIS_MODULE,
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},
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.probe = sta2x11_scr_probe,
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};
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static int __init sta2x11_scr_init(void)
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{
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pr_info("%s\n", __func__);
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return platform_driver_register(&sta2x11_scr_platform_driver);
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}
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/*
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* What follows are the PCI devices that host the above pdevs.
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* Each logic block is 4kB and they are all consecutive: we use this info.
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@ -631,6 +680,7 @@ static int __init sta2x11_mfd_init(void)
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subsys_initcall(sta2x11_apbreg_init);
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subsys_initcall(sta2x11_sctl_init);
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subsys_initcall(sta2x11_apb_soc_regs_init);
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subsys_initcall(sta2x11_scr_init);
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rootfs_initcall(sta2x11_mfd_init);
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MODULE_LICENSE("GPL v2");
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@ -482,6 +482,13 @@ u32 sta2x11_apb_soc_regs_mask(struct pci_dev *pdev, u32 reg, u32 mask, u32 val)
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#define COMPENSATION_REG3 0x3cc
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#define TEST_CTL_REG 0x3d0
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/*
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* SECR (OTP) registers
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*/
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#define STA2X11_SECR_CR 0x00
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#define STA2X11_SECR_FVR0 0x10
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#define STA2X11_SECR_FVR1 0x14
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extern int sta2x11_mfd_get_regs_data(struct platform_device *pdev,
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enum sta2x11_mfd_plat_dev index,
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void __iomem **regs,
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