Blackfin arch: smp patch cleanup from LKML review
1. Use inline get_l1_... functions instead of macro 2. Fix compile issue about smp barrier functions Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
This commit is contained in:
Родитель
f994607a2e
Коммит
dbc895f955
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@ -9,4 +9,79 @@
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#include <mach/mem_map.h>
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#ifndef __ASSEMBLY__
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#ifdef CONFIG_SMP
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static inline ulong get_l1_scratch_start_cpu(int cpu)
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{
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return (cpu) ? COREB_L1_SCRATCH_START : COREA_L1_SCRATCH_START;
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}
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static inline ulong get_l1_code_start_cpu(int cpu)
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{
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return (cpu) ? COREB_L1_CODE_START : COREA_L1_CODE_START;
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}
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static inline ulong get_l1_data_a_start_cpu(int cpu)
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{
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return (cpu) ? COREB_L1_DATA_A_START : COREA_L1_DATA_A_START;
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}
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static inline ulong get_l1_data_b_start_cpu(int cpu)
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{
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return (cpu) ? COREB_L1_DATA_B_START : COREA_L1_DATA_B_START;
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}
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static inline ulong get_l1_scratch_start(void)
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{
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return get_l1_scratch_start_cpu(blackfin_core_id());
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}
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static inline ulong get_l1_code_start(void)
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{
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return get_l1_code_start_cpu(blackfin_core_id());
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}
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static inline ulong get_l1_data_a_start(void)
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{
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return get_l1_data_a_start_cpu(blackfin_core_id());
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}
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static inline ulong get_l1_data_b_start(void)
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{
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return get_l1_data_b_start_cpu(blackfin_core_id());
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}
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#else /* !CONFIG_SMP */
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static inline ulong get_l1_scratch_start_cpu(int cpu)
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{
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return L1_SCRATCH_START;
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}
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static inline ulong get_l1_code_start_cpu(int cpu)
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{
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return L1_CODE_START;
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}
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static inline ulong get_l1_data_a_start_cpu(int cpu)
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{
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return L1_DATA_A_START;
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}
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static inline ulong get_l1_data_b_start_cpu(int cpu)
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{
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return L1_DATA_B_START;
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}
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static inline ulong get_l1_scratch_start(void)
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{
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return get_l1_scratch_start_cpu(0);
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}
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static inline ulong get_l1_code_start(void)
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{
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return get_l1_code_start_cpu(0);
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}
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static inline ulong get_l1_data_a_start(void)
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{
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return get_l1_data_a_start_cpu(0);
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}
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static inline ulong get_l1_data_b_start(void)
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{
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return get_l1_data_b_start_cpu(0);
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}
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#endif /* CONFIG_SMP */
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#endif /* __ASSEMBLY__ */
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#endif /* _MEM_MAP_H_ */
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@ -32,6 +32,8 @@
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#define raw_smp_processor_id() blackfin_core_id()
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extern char coreb_trampoline_start, coreb_trampoline_end;
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struct corelock_slot {
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int lock;
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};
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@ -66,10 +66,13 @@ asmlinkage unsigned long __raw_cmpxchg_4_asm(volatile void *ptr,
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# define smp_mb() do { barrier(); smp_check_barrier(); smp_mark_barrier(); } while (0)
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# define smp_rmb() do { barrier(); smp_check_barrier(); } while (0)
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# define smp_wmb() do { barrier(); smp_mark_barrier(); } while (0)
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#define smp_read_barrier_depends() do { barrier(); smp_check_barrier(); } while (0)
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#else
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# define smp_mb() barrier()
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# define smp_rmb() barrier()
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# define smp_wmb() barrier()
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#define smp_read_barrier_depends() barrier()
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#endif
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static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
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@ -120,8 +123,6 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
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((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
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(unsigned long)(n), sizeof(*(ptr))))
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#define smp_read_barrier_depends() smp_check_barrier()
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#else /* !CONFIG_SMP */
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#define smp_mb() barrier()
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@ -192,6 +193,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
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*/
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#include <asm/l1layout.h>
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#include <asm/mem_map.h>
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asmlinkage struct task_struct *resume(struct task_struct *prev, struct task_struct *next);
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@ -99,6 +99,8 @@ EXPORT_SYMBOL(__raw_bit_test_set_asm);
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EXPORT_SYMBOL(__raw_bit_test_clear_asm);
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EXPORT_SYMBOL(__raw_bit_test_toggle_asm);
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EXPORT_SYMBOL(__raw_uncached_fetch_asm);
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#ifdef __ARCH_SYNC_CORE_DCACHE
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EXPORT_SYMBOL(__raw_smp_mark_barrier_asm);
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EXPORT_SYMBOL(__raw_smp_check_barrier_asm);
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#endif
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#endif
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@ -25,6 +25,7 @@
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#include <asm/blackfin.h>
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#include <asm/cplb.h>
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#include <asm/cplbinit.h>
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#include <asm/mem_map.h>
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#if ANOMALY_05000263
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# error the MPU will not function safely while Anomaly 05000263 applies
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@ -27,6 +27,7 @@
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#include <asm/cacheflush.h>
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#include <asm/cplb.h>
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#include <asm/cplbinit.h>
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#include <asm/mem_map.h>
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u_long icplb_tables[NR_CPUS][CPLB_TBL_ENTRIES+1];
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u_long dcplb_tables[NR_CPUS][CPLB_TBL_ENTRIES+1];
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@ -39,6 +39,7 @@
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#include <asm/blackfin.h>
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#include <asm/fixed_code.h>
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#include <asm/mem_map.h>
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asmlinkage void ret_from_fork(void);
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@ -45,6 +45,7 @@
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#include <asm/asm-offsets.h>
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#include <asm/dma.h>
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#include <asm/fixed_code.h>
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#include <asm/mem_map.h>
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#define TEXT_OFFSET 0
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/*
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@ -99,15 +99,6 @@
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#define L1_SCRATCH_START 0xFFB00000
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#define L1_SCRATCH_LENGTH 0x1000
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#define get_l1_scratch_start_cpu(cpu) L1_SCRATCH_START
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#define get_l1_code_start_cpu(cpu) L1_CODE_START
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#define get_l1_data_a_start_cpu(cpu) L1_DATA_A_START
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#define get_l1_data_b_start_cpu(cpu) L1_DATA_B_START
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#define get_l1_scratch_start() L1_SCRATCH_START
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#define get_l1_code_start() L1_CODE_START
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#define get_l1_data_a_start() L1_DATA_A_START
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#define get_l1_data_b_start() L1_DATA_B_START
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#define GET_PDA_SAFE(preg) \
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preg.l = _cpu_pda; \
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preg.h = _cpu_pda;
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@ -99,15 +99,6 @@
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#define L1_SCRATCH_START 0xFFB00000
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#define L1_SCRATCH_LENGTH 0x1000
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#define get_l1_scratch_start_cpu(cpu) L1_SCRATCH_START
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#define get_l1_code_start_cpu(cpu) L1_CODE_START
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#define get_l1_data_a_start_cpu(cpu) L1_DATA_A_START
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#define get_l1_data_b_start_cpu(cpu) L1_DATA_B_START
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#define get_l1_scratch_start() L1_SCRATCH_START
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#define get_l1_code_start() L1_CODE_START
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#define get_l1_data_a_start() L1_DATA_A_START
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#define get_l1_data_b_start() L1_DATA_B_START
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#define GET_PDA_SAFE(preg) \
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preg.l = _cpu_pda; \
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preg.h = _cpu_pda;
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@ -168,15 +168,6 @@
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#define L1_SCRATCH_START 0xFFB00000
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#define L1_SCRATCH_LENGTH 0x1000
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#define get_l1_scratch_start_cpu(cpu) L1_SCRATCH_START
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#define get_l1_code_start_cpu(cpu) L1_CODE_START
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#define get_l1_data_a_start_cpu(cpu) L1_DATA_A_START
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#define get_l1_data_b_start_cpu(cpu) L1_DATA_B_START
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#define get_l1_scratch_start() L1_SCRATCH_START
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#define get_l1_code_start() L1_CODE_START
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#define get_l1_data_a_start() L1_DATA_A_START
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#define get_l1_data_b_start() L1_DATA_B_START
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#define GET_PDA_SAFE(preg) \
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preg.l = _cpu_pda; \
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preg.h = _cpu_pda;
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@ -176,15 +176,6 @@
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#define L1_SCRATCH_START 0xFFB00000
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#define L1_SCRATCH_LENGTH 0x1000
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#define get_l1_scratch_start_cpu(cpu) L1_SCRATCH_START
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#define get_l1_code_start_cpu(cpu) L1_CODE_START
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#define get_l1_data_a_start_cpu(cpu) L1_DATA_A_START
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#define get_l1_data_b_start_cpu(cpu) L1_DATA_B_START
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#define get_l1_scratch_start() L1_SCRATCH_START
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#define get_l1_code_start() L1_CODE_START
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#define get_l1_data_a_start() L1_DATA_A_START
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#define get_l1_data_b_start() L1_DATA_B_START
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#define GET_PDA_SAFE(preg) \
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preg.l = _cpu_pda; \
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preg.h = _cpu_pda;
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@ -104,15 +104,6 @@
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#define L1_SCRATCH_START 0xFFB00000
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#define L1_SCRATCH_LENGTH 0x1000
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#define get_l1_scratch_start_cpu(cpu) L1_SCRATCH_START
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#define get_l1_code_start_cpu(cpu) L1_CODE_START
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#define get_l1_data_a_start_cpu(cpu) L1_DATA_A_START
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#define get_l1_data_b_start_cpu(cpu) L1_DATA_B_START
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#define get_l1_scratch_start() L1_SCRATCH_START
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#define get_l1_code_start() L1_CODE_START
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#define get_l1_data_a_start() L1_DATA_A_START
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#define get_l1_data_b_start() L1_DATA_B_START
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#define GET_PDA_SAFE(preg) \
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preg.l = _cpu_pda; \
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preg.h = _cpu_pda;
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@ -108,15 +108,6 @@
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#define L1_SCRATCH_START 0xFFB00000
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#define L1_SCRATCH_LENGTH 0x1000
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#define get_l1_scratch_start_cpu(cpu) L1_SCRATCH_START
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#define get_l1_code_start_cpu(cpu) L1_CODE_START
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#define get_l1_data_a_start_cpu(cpu) L1_DATA_A_START
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#define get_l1_data_b_start_cpu(cpu) L1_DATA_B_START
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#define get_l1_scratch_start() L1_SCRATCH_START
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#define get_l1_code_start() L1_CODE_START
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#define get_l1_data_a_start() L1_DATA_A_START
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#define get_l1_data_b_start() L1_DATA_B_START
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#define GET_PDA_SAFE(preg) \
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preg.l = _cpu_pda; \
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preg.h = _cpu_pda;
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@ -85,47 +85,7 @@
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#define L1_SCRATCH_START COREA_L1_SCRATCH_START
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#define L1_SCRATCH_LENGTH 0x1000
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#ifndef __ASSEMBLY__
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#ifdef CONFIG_SMP
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#define get_l1_scratch_start_cpu(cpu) \
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({ unsigned long __addr; \
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__addr = (cpu) ? COREB_L1_SCRATCH_START : COREA_L1_SCRATCH_START;\
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__addr; })
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#define get_l1_code_start_cpu(cpu) \
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({ unsigned long __addr; \
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__addr = (cpu) ? COREB_L1_CODE_START : COREA_L1_CODE_START; \
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__addr; })
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#define get_l1_data_a_start_cpu(cpu) \
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({ unsigned long __addr; \
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__addr = (cpu) ? COREB_L1_DATA_A_START : COREA_L1_DATA_A_START;\
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__addr; })
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#define get_l1_data_b_start_cpu(cpu) \
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({ unsigned long __addr; \
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__addr = (cpu) ? COREB_L1_DATA_B_START : COREA_L1_DATA_B_START;\
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__addr; })
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#define get_l1_scratch_start() get_l1_scratch_start_cpu(blackfin_core_id())
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#define get_l1_code_start() get_l1_code_start_cpu(blackfin_core_id())
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#define get_l1_data_a_start() get_l1_data_a_start_cpu(blackfin_core_id())
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#define get_l1_data_b_start() get_l1_data_b_start_cpu(blackfin_core_id())
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#else /* !CONFIG_SMP */
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#define get_l1_scratch_start_cpu(cpu) L1_SCRATCH_START
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#define get_l1_code_start_cpu(cpu) L1_CODE_START
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#define get_l1_data_a_start_cpu(cpu) L1_DATA_A_START
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#define get_l1_data_b_start_cpu(cpu) L1_DATA_B_START
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#define get_l1_scratch_start() L1_SCRATCH_START
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#define get_l1_code_start() L1_CODE_START
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#define get_l1_data_a_start() L1_DATA_A_START
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#define get_l1_data_b_start() L1_DATA_B_START
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#endif /* !CONFIG_SMP */
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#else /* __ASSEMBLY__ */
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#ifdef __ASSEMBLY__
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/*
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* The following macros both return the address of the PDA for the
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@ -27,11 +27,6 @@
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#include <asm/smp.h>
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#include <asm/dma.h>
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#define COREB_SRAM_BASE 0xff600000
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#define COREB_SRAM_SIZE 0x4000
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extern char coreb_trampoline_start, coreb_trampoline_end;
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static DEFINE_SPINLOCK(boot_lock);
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static cpumask_t cpu_callin_map;
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@ -54,15 +49,15 @@ void __init platform_prepare_cpus(unsigned int max_cpus)
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int len;
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len = &coreb_trampoline_end - &coreb_trampoline_start + 1;
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BUG_ON(len > COREB_SRAM_SIZE);
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BUG_ON(len > L1_CODE_LENGTH);
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dma_memcpy((void *)COREB_SRAM_BASE, &coreb_trampoline_start, len);
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dma_memcpy((void *)COREB_L1_CODE_START, &coreb_trampoline_start, len);
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/* Both cores ought to be present on a bf561! */
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cpu_set(0, cpu_present_map); /* CoreA */
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cpu_set(1, cpu_present_map); /* CoreB */
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printk(KERN_INFO "CoreB bootstrap code to SRAM %p via DMA.\n", (void *)COREB_SRAM_BASE);
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printk(KERN_INFO "CoreB bootstrap code to SRAM %p via DMA.\n", (void *)COREB_L1_CODE_START);
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}
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int __init setup_profiling_timer(unsigned int multiplier) /* not supported */
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@ -39,6 +39,7 @@
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#include <linux/spinlock.h>
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#include <linux/rtc.h>
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#include <asm/blackfin.h>
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#include <asm/mem_map.h>
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#include "blackfin_sram.h"
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static DEFINE_PER_CPU(spinlock_t, l1sram_lock) ____cacheline_aligned_in_smp;
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