x86: Clean up mtrr/main.c
Fix following trivial style problems:
ERROR: trailing whitespace X 25
WARNING: Use #include <linux/uaccess.h> instead of <asm/uaccess.h>
WARNING: Use #include <linux/kvm_para.h> instead of <asm/kvm_para.h>
ERROR: do not initialise externals to 0 or NULL X 2
ERROR: "foo * bar" should be "foo *bar" X 5
ERROR: do not use assignment in if condition X 2
WARNING: line over 80 characters X 8
ERROR: return is not a function, parentheses are not required
WARNING: braces {} are not necessary for any arm of this statement
ERROR: space required before the open parenthesis '(' X 2
ERROR: open brace '{' following function declarations go on the next line
ERROR: space required after that ',' (ctx:VxV) X 8
ERROR: space required before the open parenthesis '(' X 3
ERROR: else should follow close brace '}'
WARNING: space prohibited between function name and open parenthesis '('
WARNING: EXPORT_SYMBOL(foo); should immediately follow its function/variable X 2
Also use pr_debug and pr_warning where possible.
total: 50 errors, 14 warnings
arch/x86/kernel/cpu/mtrr/main.o:
text data bss dec hex filename
3668 116 4156 7940 1f04 main.o.before
3668 116 4156 7940 1f04 main.o.after
md5:
e01af2fd28deef77c8d01e71acfbd365 main.o.before.asm
e01af2fd28deef77c8d01e71acfbd365 main.o.after.asm
Suggested-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Yinghai Lu <yinghai@kernel.org>
LKML-Reference: <20090703164225.GA21447@elte.hu>
Cc: Avi Kivity <avi@redhat.com> # Avi, please have a look at the kvm_para.h bit
[ More cleanups ]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Jaswinder Singh Rajput
Ingo Molnar
Родитель
09b22c85d5
Коммит
dbd51be026
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@ -31,32 +31,37 @@
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System Programming Guide; Section 9.11. (1997 edition - PPro).
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*/
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#define DEBUG
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#include <linux/types.h> /* FIXME: kvm_para.h needs this */
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#include <linux/kvm_para.h>
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#include <linux/uaccess.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/init.h>
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#include <linux/sort.h>
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#include <linux/cpu.h>
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#include <linux/pci.h>
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#include <linux/smp.h>
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#include <linux/cpu.h>
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#include <linux/mutex.h>
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#include <linux/sort.h>
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#include <asm/processor.h>
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#include <asm/e820.h>
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#include <asm/mtrr.h>
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#include <asm/uaccess.h>
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#include <asm/processor.h>
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#include <asm/msr.h>
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#include <asm/kvm_para.h>
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#include "mtrr.h"
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u32 num_var_ranges = 0;
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u32 num_var_ranges;
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unsigned int mtrr_usage_table[MTRR_MAX_VAR_RANGES];
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static DEFINE_MUTEX(mtrr_mutex);
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u64 size_or_mask, size_and_mask;
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static struct mtrr_ops * mtrr_ops[X86_VENDOR_NUM] = {};
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static struct mtrr_ops *mtrr_ops[X86_VENDOR_NUM];
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struct mtrr_ops * mtrr_if = NULL;
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struct mtrr_ops *mtrr_if;
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static void set_mtrr(unsigned int reg, unsigned long base,
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unsigned long size, mtrr_type type);
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@ -73,29 +78,35 @@ static int have_wrcomb(void)
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struct pci_dev *dev;
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u8 rev;
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if ((dev = pci_get_class(PCI_CLASS_BRIDGE_HOST << 8, NULL)) != NULL) {
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/* ServerWorks LE chipsets < rev 6 have problems with write-combining
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Don't allow it and leave room for other chipsets to be tagged */
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dev = pci_get_class(PCI_CLASS_BRIDGE_HOST << 8, NULL);
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if (dev != NULL) {
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/*
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* ServerWorks LE chipsets < rev 6 have problems with
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* write-combining. Don't allow it and leave room for other
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* chipsets to be tagged
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*/
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if (dev->vendor == PCI_VENDOR_ID_SERVERWORKS &&
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dev->device == PCI_DEVICE_ID_SERVERWORKS_LE) {
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pci_read_config_byte(dev, PCI_CLASS_REVISION, &rev);
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if (rev <= 5) {
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printk(KERN_INFO "mtrr: Serverworks LE rev < 6 detected. Write-combining disabled.\n");
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pr_info("mtrr: Serverworks LE rev < 6 detected. Write-combining disabled.\n");
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pci_dev_put(dev);
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return 0;
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}
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}
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/* Intel 450NX errata # 23. Non ascending cacheline evictions to
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write combining memory may resulting in data corruption */
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/*
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* Intel 450NX errata # 23. Non ascending cacheline evictions to
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* write combining memory may resulting in data corruption
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*/
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if (dev->vendor == PCI_VENDOR_ID_INTEL &&
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dev->device == PCI_DEVICE_ID_INTEL_82451NX) {
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printk(KERN_INFO "mtrr: Intel 450NX MMC detected. Write-combining disabled.\n");
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pr_info("mtrr: Intel 450NX MMC detected. Write-combining disabled.\n");
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pci_dev_put(dev);
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return 0;
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}
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pci_dev_put(dev);
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}
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return (mtrr_if->have_wrcomb ? mtrr_if->have_wrcomb() : 0);
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return mtrr_if->have_wrcomb ? mtrr_if->have_wrcomb() : 0;
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}
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/* This function returns the number of variable MTRRs */
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@ -103,12 +114,13 @@ static void __init set_num_var_ranges(void)
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{
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unsigned long config = 0, dummy;
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if (use_intel()) {
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if (use_intel())
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rdmsr(MSR_MTRRcap, config, dummy);
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} else if (is_cpu(AMD))
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else if (is_cpu(AMD))
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config = 2;
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else if (is_cpu(CYRIX) || is_cpu(CENTAUR))
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config = 8;
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num_var_ranges = config & 0xff;
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}
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@ -130,10 +142,12 @@ struct set_mtrr_data {
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mtrr_type smp_type;
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};
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static void ipi_handler(void *info)
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/* [SUMMARY] Synchronisation handler. Executed by "other" CPUs.
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[RETURNS] Nothing.
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/**
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* ipi_handler - Synchronisation handler. Executed by "other" CPUs.
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*
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* Returns nothing.
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*/
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static void ipi_handler(void *info)
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{
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#ifdef CONFIG_SMP
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struct set_mtrr_data *data = info;
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@ -146,11 +160,12 @@ static void ipi_handler(void *info)
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cpu_relax();
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/* The master has cleared me to execute */
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if (data->smp_reg != ~0U)
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if (data->smp_reg != ~0U) {
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mtrr_if->set(data->smp_reg, data->smp_base,
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data->smp_size, data->smp_type);
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else
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} else {
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mtrr_if->set_all();
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}
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atomic_dec(&data->count);
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while (atomic_read(&data->gate))
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@ -161,7 +176,8 @@ static void ipi_handler(void *info)
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#endif
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}
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static inline int types_compatible(mtrr_type type1, mtrr_type type2) {
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static inline int types_compatible(mtrr_type type1, mtrr_type type2)
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{
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return type1 == MTRR_TYPE_UNCACHABLE ||
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type2 == MTRR_TYPE_UNCACHABLE ||
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(type1 == MTRR_TYPE_WRTHROUGH && type2 == MTRR_TYPE_WRBACK) ||
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@ -197,18 +213,19 @@ static inline int types_compatible(mtrr_type type1, mtrr_type type2) {
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* of CPUs. As each CPU disables interrupts, it'll decrement it once. We wait
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* until it hits 0 and proceed. We set the data.gate flag and reset data.count.
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* Meanwhile, they are waiting for that flag to be set. Once it's set, each
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* CPU goes through the transition of updating MTRRs. The CPU vendors may each do it
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* differently, so we call mtrr_if->set() callback and let them take care of it.
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* When they're done, they again decrement data->count and wait for data.gate to
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* be reset.
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* When we finish, we wait for data.count to hit 0 and toggle the data.gate flag.
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* CPU goes through the transition of updating MTRRs.
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* The CPU vendors may each do it differently,
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* so we call mtrr_if->set() callback and let them take care of it.
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* When they're done, they again decrement data->count and wait for data.gate
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* to be reset.
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* When we finish, we wait for data.count to hit 0 and toggle the data.gate flag
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* Everyone then enables interrupts and we all continue on.
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*
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* Note that the mechanism is the same for UP systems, too; all the SMP stuff
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* becomes nops.
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*/
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static void set_mtrr(unsigned int reg, unsigned long base,
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unsigned long size, mtrr_type type)
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static void
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set_mtrr(unsigned int reg, unsigned long base, unsigned long size, mtrr_type type)
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{
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struct set_mtrr_data data;
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unsigned long flags;
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@ -218,7 +235,8 @@ static void set_mtrr(unsigned int reg, unsigned long base,
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data.smp_size = size;
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data.smp_type = type;
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atomic_set(&data.count, num_booting_cpus() - 1);
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/* make sure data.count is visible before unleashing other CPUs */
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/* Make sure data.count is visible before unleashing other CPUs */
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smp_wmb();
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atomic_set(&data.gate, 0);
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@ -231,14 +249,15 @@ static void set_mtrr(unsigned int reg, unsigned long base,
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while (atomic_read(&data.count))
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cpu_relax();
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/* ok, reset count and toggle gate */
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/* Ok, reset count and toggle gate */
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atomic_set(&data.count, num_booting_cpus() - 1);
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smp_wmb();
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atomic_set(&data.gate, 1);
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/* do our MTRR business */
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/* Do our MTRR business */
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/* HACK!
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/*
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* HACK!
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* We use this same function to initialize the mtrrs on boot.
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* The state of the boot cpu's mtrrs has been saved, and we want
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* to replicate across all the APs.
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@ -247,7 +266,7 @@ static void set_mtrr(unsigned int reg, unsigned long base,
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if (reg != ~0U)
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mtrr_if->set(reg, base, size, type);
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/* wait for the others */
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/* Wait for the others */
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while (atomic_read(&data.count))
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cpu_relax();
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@ -300,39 +319,38 @@ static void set_mtrr(unsigned int reg, unsigned long base,
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* BUGS: Needs a quiet flag for the cases where drivers do not mind
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* failures and do not wish system log messages to be sent.
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*/
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int mtrr_add_page(unsigned long base, unsigned long size,
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unsigned int type, bool increment)
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{
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unsigned long lbase, lsize;
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int i, replace, error;
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mtrr_type ltype;
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unsigned long lbase, lsize;
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if (!mtrr_if)
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return -ENXIO;
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if ((error = mtrr_if->validate_add_page(base,size,type)))
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error = mtrr_if->validate_add_page(base, size, type);
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if (error)
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return error;
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if (type >= MTRR_NUM_TYPES) {
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printk(KERN_WARNING "mtrr: type: %u invalid\n", type);
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pr_warning("mtrr: type: %u invalid\n", type);
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return -EINVAL;
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}
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/* If the type is WC, check that this processor supports it */
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if ((type == MTRR_TYPE_WRCOMB) && !have_wrcomb()) {
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printk(KERN_WARNING
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"mtrr: your processor doesn't support write-combining\n");
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pr_warning("mtrr: your processor doesn't support write-combining\n");
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return -ENOSYS;
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}
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if (!size) {
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printk(KERN_WARNING "mtrr: zero sized request\n");
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pr_warning("mtrr: zero sized request\n");
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return -EINVAL;
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}
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if (base & size_or_mask || size & size_or_mask) {
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printk(KERN_WARNING "mtrr: base or size exceeds the MTRR width\n");
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pr_warning("mtrr: base or size exceeds the MTRR width\n");
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return -EINVAL;
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}
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@ -341,25 +359,29 @@ int mtrr_add_page(unsigned long base, unsigned long size,
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/* No CPU hotplug when we change MTRR entries */
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get_online_cpus();
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/* Search for existing MTRR */
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mutex_lock(&mtrr_mutex);
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for (i = 0; i < num_var_ranges; ++i) {
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mtrr_if->get(i, &lbase, &lsize, <ype);
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if (!lsize || base > lbase + lsize - 1 || base + size - 1 < lbase)
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if (!lsize || base > lbase + lsize - 1 ||
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base + size - 1 < lbase)
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continue;
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/* At this point we know there is some kind of overlap/enclosure */
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/*
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* At this point we know there is some kind of
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* overlap/enclosure
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*/
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if (base < lbase || base + size - 1 > lbase + lsize - 1) {
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if (base <= lbase && base + size - 1 >= lbase + lsize - 1) {
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if (base <= lbase &&
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base + size - 1 >= lbase + lsize - 1) {
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/* New region encloses an existing region */
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if (type == ltype) {
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replace = replace == -1 ? i : -2;
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continue;
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}
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else if (types_compatible(type, ltype))
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} else if (types_compatible(type, ltype))
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continue;
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}
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printk(KERN_WARNING
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"mtrr: 0x%lx000,0x%lx000 overlaps existing"
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pr_warning("mtrr: 0x%lx000,0x%lx000 overlaps existing"
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" 0x%lx000,0x%lx000\n", base, size, lbase,
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lsize);
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goto out;
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@ -368,7 +390,7 @@ int mtrr_add_page(unsigned long base, unsigned long size,
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if (ltype != type) {
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if (types_compatible(type, ltype))
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continue;
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printk (KERN_WARNING "mtrr: type mismatch for %lx000,%lx000 old: %s new: %s\n",
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pr_warning("mtrr: type mismatch for %lx000,%lx000 old: %s new: %s\n",
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base, size, mtrr_attrib_to_str(ltype),
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mtrr_attrib_to_str(type));
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goto out;
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|
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@ -393,8 +415,9 @@ int mtrr_add_page(unsigned long base, unsigned long size,
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mtrr_usage_table[replace] = 0;
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}
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}
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} else
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printk(KERN_INFO "mtrr: no more MTRRs available\n");
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} else {
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pr_info("mtrr: no more MTRRs available\n");
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}
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error = i;
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out:
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mutex_unlock(&mtrr_mutex);
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|
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@ -405,10 +428,8 @@ int mtrr_add_page(unsigned long base, unsigned long size,
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static int mtrr_check(unsigned long base, unsigned long size)
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{
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if ((base & (PAGE_SIZE - 1)) || (size & (PAGE_SIZE - 1))) {
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printk(KERN_WARNING
|
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"mtrr: size and base must be multiples of 4 kiB\n");
|
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printk(KERN_DEBUG
|
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"mtrr: size: 0x%lx base: 0x%lx\n", size, base);
|
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pr_warning("mtrr: size and base must be multiples of 4 kiB\n");
|
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pr_debug("mtrr: size: 0x%lx base: 0x%lx\n", size, base);
|
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dump_stack();
|
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return -1;
|
||||
}
|
||||
|
|
@ -450,9 +471,7 @@ static int mtrr_check(unsigned long base, unsigned long size)
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|||
* BUGS: Needs a quiet flag for the cases where drivers do not mind
|
||||
* failures and do not wish system log messages to be sent.
|
||||
*/
|
||||
|
||||
int
|
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mtrr_add(unsigned long base, unsigned long size, unsigned int type,
|
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int mtrr_add(unsigned long base, unsigned long size, unsigned int type,
|
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bool increment)
|
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{
|
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if (mtrr_check(base, size))
|
||||
|
|
@ -460,6 +479,7 @@ mtrr_add(unsigned long base, unsigned long size, unsigned int type,
|
|||
return mtrr_add_page(base >> PAGE_SHIFT, size >> PAGE_SHIFT, type,
|
||||
increment);
|
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}
|
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EXPORT_SYMBOL(mtrr_add);
|
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|
||||
/**
|
||||
* mtrr_del_page - delete a memory type region
|
||||
|
|
@ -475,7 +495,6 @@ mtrr_add(unsigned long base, unsigned long size, unsigned int type,
|
|||
* On success the register is returned, on failure a negative error
|
||||
* code.
|
||||
*/
|
||||
|
||||
int mtrr_del_page(int reg, unsigned long base, unsigned long size)
|
||||
{
|
||||
int i, max;
|
||||
|
|
@ -500,22 +519,22 @@ int mtrr_del_page(int reg, unsigned long base, unsigned long size)
|
|||
}
|
||||
}
|
||||
if (reg < 0) {
|
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printk(KERN_DEBUG "mtrr: no MTRR for %lx000,%lx000 found\n", base,
|
||||
size);
|
||||
pr_debug("mtrr: no MTRR for %lx000,%lx000 found\n",
|
||||
base, size);
|
||||
goto out;
|
||||
}
|
||||
}
|
||||
if (reg >= max) {
|
||||
printk(KERN_WARNING "mtrr: register: %d too big\n", reg);
|
||||
pr_warning("mtrr: register: %d too big\n", reg);
|
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goto out;
|
||||
}
|
||||
mtrr_if->get(reg, &lbase, &lsize, <ype);
|
||||
if (lsize < 1) {
|
||||
printk(KERN_WARNING "mtrr: MTRR %d not used\n", reg);
|
||||
pr_warning("mtrr: MTRR %d not used\n", reg);
|
||||
goto out;
|
||||
}
|
||||
if (mtrr_usage_table[reg] < 1) {
|
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printk(KERN_WARNING "mtrr: reg: %d has count=0\n", reg);
|
||||
pr_warning("mtrr: reg: %d has count=0\n", reg);
|
||||
goto out;
|
||||
}
|
||||
if (--mtrr_usage_table[reg] < 1)
|
||||
|
|
@ -526,6 +545,7 @@ int mtrr_del_page(int reg, unsigned long base, unsigned long size)
|
|||
put_online_cpus();
|
||||
return error;
|
||||
}
|
||||
|
||||
/**
|
||||
* mtrr_del - delete a memory type region
|
||||
* @reg: Register returned by mtrr_add
|
||||
|
|
@ -540,19 +560,16 @@ int mtrr_del_page(int reg, unsigned long base, unsigned long size)
|
|||
* On success the register is returned, on failure a negative error
|
||||
* code.
|
||||
*/
|
||||
|
||||
int
|
||||
mtrr_del(int reg, unsigned long base, unsigned long size)
|
||||
int mtrr_del(int reg, unsigned long base, unsigned long size)
|
||||
{
|
||||
if (mtrr_check(base, size))
|
||||
return -EINVAL;
|
||||
return mtrr_del_page(reg, base >> PAGE_SHIFT, size >> PAGE_SHIFT);
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(mtrr_add);
|
||||
EXPORT_SYMBOL(mtrr_del);
|
||||
|
||||
/* HACK ALERT!
|
||||
/*
|
||||
* HACK ALERT!
|
||||
* These should be called implicitly, but we can't yet until all the initcall
|
||||
* stuff is done...
|
||||
*/
|
||||
|
|
@ -581,8 +598,7 @@ static int mtrr_save(struct sys_device * sysdev, pm_message_t state)
|
|||
int i;
|
||||
|
||||
for (i = 0; i < num_var_ranges; i++) {
|
||||
mtrr_if->get(i,
|
||||
&mtrr_value[i].lbase,
|
||||
mtrr_if->get(i, &mtrr_value[i].lbase,
|
||||
&mtrr_value[i].lsize,
|
||||
&mtrr_value[i].ltype);
|
||||
}
|
||||
|
|
@ -594,12 +610,12 @@ static int mtrr_restore(struct sys_device * sysdev)
|
|||
int i;
|
||||
|
||||
for (i = 0; i < num_var_ranges; i++) {
|
||||
if (mtrr_value[i].lsize)
|
||||
set_mtrr(i,
|
||||
mtrr_value[i].lbase,
|
||||
if (mtrr_value[i].lsize) {
|
||||
set_mtrr(i, mtrr_value[i].lbase,
|
||||
mtrr_value[i].lsize,
|
||||
mtrr_value[i].ltype);
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -622,6 +638,7 @@ int __initdata changed_by_mtrr_cleanup;
|
|||
void __init mtrr_bp_init(void)
|
||||
{
|
||||
u32 phys_addr;
|
||||
|
||||
init_ifs();
|
||||
|
||||
phys_addr = 32;
|
||||
|
|
@ -632,9 +649,11 @@ void __init mtrr_bp_init(void)
|
|||
size_and_mask = 0x00f00000;
|
||||
phys_addr = 36;
|
||||
|
||||
/* This is an AMD specific MSR, but we assume(hope?) that
|
||||
Intel will implement it to when they extend the address
|
||||
bus of the Xeon. */
|
||||
/*
|
||||
* This is an AMD specific MSR, but we assume(hope?) that
|
||||
* Intel will implement it to when they extend the address
|
||||
* bus of the Xeon.
|
||||
*/
|
||||
if (cpuid_eax(0x80000000) >= 0x80000008) {
|
||||
phys_addr = cpuid_eax(0x80000008) & 0xff;
|
||||
/* CPUID workaround for Intel 0F33/0F34 CPU */
|
||||
|
|
@ -649,8 +668,10 @@ void __init mtrr_bp_init(void)
|
|||
size_and_mask = ~size_or_mask & 0xfffff00000ULL;
|
||||
} else if (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR &&
|
||||
boot_cpu_data.x86 == 6) {
|
||||
/* VIA C* family have Intel style MTRRs, but
|
||||
don't support PAE */
|
||||
/*
|
||||
* VIA C* family have Intel style MTRRs,
|
||||
* but don't support PAE
|
||||
*/
|
||||
size_or_mask = 0xfff00000; /* 32 bits */
|
||||
size_and_mask = 0;
|
||||
phys_addr = 32;
|
||||
|
|
@ -694,7 +715,6 @@ void __init mtrr_bp_init(void)
|
|||
changed_by_mtrr_cleanup = 1;
|
||||
mtrr_if->set_all();
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -706,12 +726,17 @@ void mtrr_ap_init(void)
|
|||
if (!mtrr_if || !use_intel())
|
||||
return;
|
||||
/*
|
||||
* Ideally we should hold mtrr_mutex here to avoid mtrr entries changed,
|
||||
* but this routine will be called in cpu boot time, holding the lock
|
||||
* breaks it. This routine is called in two cases: 1.very earily time
|
||||
* of software resume, when there absolutely isn't mtrr entry changes;
|
||||
* 2.cpu hotadd time. We let mtrr_add/del_page hold cpuhotplug lock to
|
||||
* prevent mtrr entry changes
|
||||
* Ideally we should hold mtrr_mutex here to avoid mtrr entries
|
||||
* changed, but this routine will be called in cpu boot time,
|
||||
* holding the lock breaks it.
|
||||
*
|
||||
* This routine is called in two cases:
|
||||
*
|
||||
* 1. very earily time of software resume, when there absolutely
|
||||
* isn't mtrr entry changes;
|
||||
*
|
||||
* 2. cpu hotadd time. We let mtrr_add/del_page hold cpuhotplug
|
||||
* lock to prevent mtrr entry changes
|
||||
*/
|
||||
local_irq_save(flags);
|
||||
|
||||
|
|
@ -732,19 +757,23 @@ static int __init mtrr_init_finialize(void)
|
|||
{
|
||||
if (!mtrr_if)
|
||||
return 0;
|
||||
|
||||
if (use_intel()) {
|
||||
if (!changed_by_mtrr_cleanup)
|
||||
mtrr_state_warn();
|
||||
} else {
|
||||
/* The CPUs haven't MTRR and seem to not support SMP. They have
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* The CPU has no MTRR and seems to not support SMP. They have
|
||||
* specific drivers, we use a tricky method to support
|
||||
* suspend/resume for them.
|
||||
*
|
||||
* TBD: is there any system with such CPU which supports
|
||||
* suspend/resume? if no, we should remove the code.
|
||||
* suspend/resume? If no, we should remove the code.
|
||||
*/
|
||||
sysdev_driver_register(&cpu_sysdev_class,
|
||||
&mtrr_sysdev_driver);
|
||||
}
|
||||
sysdev_driver_register(&cpu_sysdev_class, &mtrr_sysdev_driver);
|
||||
|
||||
return 0;
|
||||
}
|
||||
subsys_initcall(mtrr_init_finialize);
|
||||
|
|
|
|||
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