drm/i915: avoid reading non-existent PLL reg on Ironlake+
These functions need to be reworked for Ironlake and above, but until then at least avoid reading non-existent registers. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> [ickle: combine with a gratuitous tidy] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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@ -5036,8 +5036,8 @@ static void intel_increase_pllclock(struct drm_crtc *crtc)
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drm_i915_private_t *dev_priv = dev->dev_private;
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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int pipe = intel_crtc->pipe;
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int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;
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int dpll = I915_READ(dpll_reg);
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int dpll_reg = DPLL(pipe);
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int dpll;
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if (HAS_PCH_SPLIT(dev))
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return;
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@ -5045,17 +5045,19 @@ static void intel_increase_pllclock(struct drm_crtc *crtc)
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if (!dev_priv->lvds_downclock_avail)
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return;
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dpll = I915_READ(dpll_reg);
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if (!HAS_PIPE_CXSR(dev) && (dpll & DISPLAY_RATE_SELECT_FPA1)) {
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DRM_DEBUG_DRIVER("upclocking LVDS\n");
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/* Unlock panel regs */
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I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) |
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PANEL_UNLOCK_REGS);
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I915_WRITE(PP_CONTROL,
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I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
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dpll &= ~DISPLAY_RATE_SELECT_FPA1;
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I915_WRITE(dpll_reg, dpll);
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dpll = I915_READ(dpll_reg);
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POSTING_READ(dpll_reg);
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intel_wait_for_vblank(dev, pipe);
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dpll = I915_READ(dpll_reg);
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if (dpll & DISPLAY_RATE_SELECT_FPA1)
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DRM_DEBUG_DRIVER("failed to upclock LVDS!\n");
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