coresight-tpiu: add CoreSight TPIU driver
This driver manages CoreSight TPIU (Trace Port Interface Unit) which acts as a sink. TPIU is typically connected to some offchip hardware hosting a storage buffer. Signed-off-by: Pratik Patel <pratikp@codeaurora.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -1359,5 +1359,14 @@ config CORESIGHT_LINK_AND_SINK_TMC
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- ETR) or sink (embedded trace FIFO). The driver complies with the
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generic implementation of the component without special enhancement or
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added features.
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config CORESIGHT_SINK_TPIU
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bool "Coresight generic TPIU driver"
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depends on CORESIGHT_LINKS_AND_SINKS
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help
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This enables support for the Trace Port Interface Unit driver, responsible
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for bridging the gap between the on-chip coresight components and a trace
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port collection engine, typically connected to an external host for use
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case capturing more traces than the on-board coresight memory can handle.
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endif
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endmenu
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@ -4,3 +4,4 @@
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obj-$(CONFIG_CORESIGHT) += coresight.o
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obj-$(CONFIG_OF) += of_coresight.o
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obj-$(CONFIG_CORESIGHT_LINK_AND_SINK_TMC) += coresight-tmc.o
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obj-$(CONFIG_CORESIGHT_SINK_TPIU) += coresight-tpiu.o
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@ -0,0 +1,217 @@
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/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include <linux/slab.h>
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#include <linux/clk.h>
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#include <linux/coresight.h>
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#include <linux/amba/bus.h>
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#include "coresight-priv.h"
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#define TPIU_SUPP_PORTSZ 0x000
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#define TPIU_CURR_PORTSZ 0x004
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#define TPIU_SUPP_TRIGMODES 0x100
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#define TPIU_TRIG_CNTRVAL 0x104
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#define TPIU_TRIG_MULT 0x108
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#define TPIU_SUPP_TESTPATM 0x200
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#define TPIU_CURR_TESTPATM 0x204
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#define TPIU_TEST_PATREPCNTR 0x208
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#define TPIU_FFSR 0x300
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#define TPIU_FFCR 0x304
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#define TPIU_FSYNC_CNTR 0x308
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#define TPIU_EXTCTL_INPORT 0x400
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#define TPIU_EXTCTL_OUTPORT 0x404
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#define TPIU_ITTRFLINACK 0xee4
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#define TPIU_ITTRFLIN 0xee8
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#define TPIU_ITATBDATA0 0xeec
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#define TPIU_ITATBCTR2 0xef0
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#define TPIU_ITATBCTR1 0xef4
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#define TPIU_ITATBCTR0 0xef8
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/** register definition **/
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/* FFCR - 0x304 */
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#define FFCR_FON_MAN BIT(6)
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/**
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* @base: memory mapped base address for this component.
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* @dev: the device entity associated to this component.
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* @csdev: component vitals needed by the framework.
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* @clk: the clock this component is associated to.
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*/
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struct tpiu_drvdata {
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void __iomem *base;
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struct device *dev;
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struct coresight_device *csdev;
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struct clk *clk;
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};
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static void tpiu_enable_hw(struct tpiu_drvdata *drvdata)
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{
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CS_UNLOCK(drvdata->base);
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/* TODO: fill this up */
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CS_LOCK(drvdata->base);
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}
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static int tpiu_enable(struct coresight_device *csdev)
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{
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struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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int ret;
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ret = clk_prepare_enable(drvdata->clk);
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if (ret)
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return ret;
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tpiu_enable_hw(drvdata);
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dev_info(drvdata->dev, "TPIU enabled\n");
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return 0;
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}
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static void tpiu_disable_hw(struct tpiu_drvdata *drvdata)
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{
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CS_UNLOCK(drvdata->base);
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/* Clear formatter controle reg. */
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writel_relaxed(0x0, drvdata->base + TPIU_FFCR);
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/* Generate manual flush */
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writel_relaxed(FFCR_FON_MAN, drvdata->base + TPIU_FFCR);
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CS_LOCK(drvdata->base);
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}
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static void tpiu_disable(struct coresight_device *csdev)
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{
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struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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tpiu_disable_hw(drvdata);
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clk_disable_unprepare(drvdata->clk);
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dev_info(drvdata->dev, "TPIU disabled\n");
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}
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static const struct coresight_ops_sink tpiu_sink_ops = {
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.enable = tpiu_enable,
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.disable = tpiu_disable,
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};
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static const struct coresight_ops tpiu_cs_ops = {
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.sink_ops = &tpiu_sink_ops,
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};
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static int tpiu_probe(struct amba_device *adev, const struct amba_id *id)
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{
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int ret;
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void __iomem *base;
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struct device *dev = &adev->dev;
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struct coresight_platform_data *pdata = NULL;
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struct tpiu_drvdata *drvdata;
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struct resource *res = &adev->res;
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struct coresight_desc *desc;
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struct device_node *np = adev->dev.of_node;
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if (np) {
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pdata = of_get_coresight_platform_data(dev, np);
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if (IS_ERR(pdata))
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return PTR_ERR(pdata);
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adev->dev.platform_data = pdata;
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}
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drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
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if (!drvdata)
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return -ENOMEM;
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drvdata->dev = &adev->dev;
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dev_set_drvdata(dev, drvdata);
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/* Validity for the resource is already checked by the AMBA core */
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base = devm_ioremap_resource(dev, res);
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if (IS_ERR(base))
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return PTR_ERR(base);
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drvdata->base = base;
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drvdata->clk = adev->pclk;
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ret = clk_prepare_enable(drvdata->clk);
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if (ret)
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return ret;
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/* Disable tpiu to support older devices */
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tpiu_disable_hw(drvdata);
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clk_disable_unprepare(drvdata->clk);
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desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
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if (!desc)
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return -ENOMEM;
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desc->type = CORESIGHT_DEV_TYPE_SINK;
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desc->subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_PORT;
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desc->ops = &tpiu_cs_ops;
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desc->pdata = pdata;
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desc->dev = dev;
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drvdata->csdev = coresight_register(desc);
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if (IS_ERR(drvdata->csdev))
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return PTR_ERR(drvdata->csdev);
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dev_info(dev, "TPIU initialized\n");
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return 0;
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}
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static int tpiu_remove(struct amba_device *adev)
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{
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struct tpiu_drvdata *drvdata = amba_get_drvdata(adev);
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coresight_unregister(drvdata->csdev);
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return 0;
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}
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static struct amba_id tpiu_ids[] = {
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{
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.id = 0x0003b912,
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.mask = 0x0003ffff,
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},
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{ 0, 0},
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};
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static struct amba_driver tpiu_driver = {
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.drv = {
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.name = "coresight-tpiu",
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.owner = THIS_MODULE,
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},
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.probe = tpiu_probe,
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.remove = tpiu_remove,
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.id_table = tpiu_ids,
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};
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static int __init tpiu_init(void)
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{
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return amba_driver_register(&tpiu_driver);
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}
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module_init(tpiu_init);
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static void __exit tpiu_exit(void)
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{
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amba_driver_unregister(&tpiu_driver);
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}
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module_exit(tpiu_exit);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("CoreSight Trace Port Interface Unit driver");
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