drivers: net: xgene: Preparing for adding SGMII based 1GbE
- Added link_state function pointer to the xgene__mac_ops structure - Moved ring manager (pdata->rm) assignment to xgene_enet_setup_ops - Removed unused variable (pdata->phy_addr) and macro (FULL_DUPLEX) Signed-off-by: Iyappan Subramanian <isubramanian@apm.com> Signed-off-by: Keyur Chudgar <kchudgar@apm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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4c2e7f0954
Коммит
dc8385f0c0
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@ -410,7 +410,6 @@ static void xgene_gmac_set_mac_addr(struct xgene_enet_pdata *pdata)
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addr0 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
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(dev_addr[1] << 8) | dev_addr[0];
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addr1 = (dev_addr[5] << 24) | (dev_addr[4] << 16);
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addr1 |= pdata->phy_addr & 0xFFFF;
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xgene_enet_wr_mcx_mac(pdata, STATION_ADDR0_ADDR, addr0);
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xgene_enet_wr_mcx_mac(pdata, STATION_ADDR1_ADDR, addr1);
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@ -179,7 +179,6 @@ enum xgene_enet_rm {
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#define TUND_ADDR 0x4a
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#define TSO_IPPROTO_TCP 1
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#define FULL_DUPLEX 2
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#define USERINFO_POS 0
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#define USERINFO_LEN 32
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@ -833,11 +833,9 @@ static int xgene_enet_get_resources(struct xgene_enet_pdata *pdata)
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if (pdata->phy_mode == PHY_INTERFACE_MODE_RGMII) {
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pdata->mcx_mac_addr = base_addr + BLOCK_ETH_MAC_OFFSET;
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pdata->mcx_mac_csr_addr = base_addr + BLOCK_ETH_MAC_CSR_OFFSET;
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pdata->rm = RM3;
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} else {
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pdata->mcx_mac_addr = base_addr + BLOCK_AXG_MAC_OFFSET;
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pdata->mcx_mac_csr_addr = base_addr + BLOCK_AXG_MAC_CSR_OFFSET;
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pdata->rm = RM0;
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}
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pdata->rx_buff_cnt = NUM_PKT_BUF;
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@ -881,10 +879,12 @@ static void xgene_enet_setup_ops(struct xgene_enet_pdata *pdata)
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case PHY_INTERFACE_MODE_RGMII:
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pdata->mac_ops = &xgene_gmac_ops;
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pdata->port_ops = &xgene_gport_ops;
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pdata->rm = RM3;
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break;
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default:
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pdata->mac_ops = &xgene_xgmac_ops;
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pdata->port_ops = &xgene_xgport_ops;
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pdata->rm = RM0;
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break;
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}
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}
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@ -895,6 +895,7 @@ static int xgene_enet_probe(struct platform_device *pdev)
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struct xgene_enet_pdata *pdata;
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struct device *dev = &pdev->dev;
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struct napi_struct *napi;
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struct xgene_mac_ops *mac_ops;
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int ret;
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ndev = alloc_etherdev(sizeof(struct xgene_enet_pdata));
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@ -937,10 +938,11 @@ static int xgene_enet_probe(struct platform_device *pdev)
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napi = &pdata->rx_ring->napi;
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netif_napi_add(ndev, napi, xgene_enet_napi, NAPI_POLL_WEIGHT);
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mac_ops = pdata->mac_ops;
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if (pdata->phy_mode == PHY_INTERFACE_MODE_RGMII)
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ret = xgene_enet_mdio_config(pdata);
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else
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INIT_DELAYED_WORK(&pdata->link_work, xgene_enet_link_state);
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INIT_DELAYED_WORK(&pdata->link_work, mac_ops->link_state);
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return ret;
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err:
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@ -76,6 +76,7 @@ struct xgene_mac_ops {
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void (*tx_disable)(struct xgene_enet_pdata *pdata);
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void (*rx_disable)(struct xgene_enet_pdata *pdata);
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void (*set_mac_addr)(struct xgene_enet_pdata *pdata);
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void (*link_state)(struct work_struct *work);
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};
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struct xgene_port_ops {
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@ -109,7 +110,6 @@ struct xgene_enet_pdata {
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void __iomem *base_addr;
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void __iomem *ring_csr_addr;
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void __iomem *ring_cmd_addr;
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u32 phy_addr;
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int phy_mode;
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enum xgene_enet_rm rm;
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struct rtnl_link_stats64 stats;
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@ -284,7 +284,7 @@ static void xgene_enet_shutdown(struct xgene_enet_pdata *pdata)
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clk_disable_unprepare(pdata->clk);
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}
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void xgene_enet_link_state(struct work_struct *work)
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static void xgene_enet_link_state(struct work_struct *work)
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{
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struct xgene_enet_pdata *pdata = container_of(to_delayed_work(work),
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struct xgene_enet_pdata, link_work);
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@ -322,6 +322,7 @@ struct xgene_mac_ops xgene_xgmac_ops = {
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.rx_disable = xgene_xgmac_rx_disable,
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.tx_disable = xgene_xgmac_tx_disable,
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.set_mac_addr = xgene_xgmac_set_mac_addr,
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.link_state = xgene_enet_link_state
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};
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struct xgene_port_ops xgene_xgport_ops = {
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@ -50,7 +50,6 @@
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#define PHY_POLL_LINK_ON (10 * HZ)
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#define PHY_POLL_LINK_OFF (PHY_POLL_LINK_ON / 5)
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void xgene_enet_link_state(struct work_struct *work);
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extern struct xgene_mac_ops xgene_xgmac_ops;
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extern struct xgene_port_ops xgene_xgport_ops;
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