[POWERPC] Move the iSeries exception vectors
out of head_64.S and into platforms/iseries/exception.S Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Stephen Rothwell
Paul Mackerras
Родитель
f9ff0f3048
Коммит
dc8f571a26
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@ -358,142 +358,6 @@ machine_check_fwnmi:
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mtspr SPRN_SPRG1,r13 /* save r13 */
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EXCEPTION_PROLOG_PSERIES_FORCE_64BIT(PACA_EXMC, machine_check_common)
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#ifdef CONFIG_PPC_ISERIES
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/*** ISeries-LPAR interrupt handlers ***/
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STD_EXCEPTION_ISERIES(0x200, machine_check, PACA_EXMC)
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.globl data_access_iSeries
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data_access_iSeries:
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mtspr SPRN_SPRG1,r13
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BEGIN_FTR_SECTION
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mtspr SPRN_SPRG2,r12
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mfspr r13,SPRN_DAR
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mfspr r12,SPRN_DSISR
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srdi r13,r13,60
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rlwimi r13,r12,16,0x20
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mfcr r12
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cmpwi r13,0x2c
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beq .do_stab_bolted_iSeries
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mtcrf 0x80,r12
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mfspr r12,SPRN_SPRG2
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END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
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EXCEPTION_PROLOG_ISERIES_1(PACA_EXGEN)
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EXCEPTION_PROLOG_ISERIES_2
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b data_access_common
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.do_stab_bolted_iSeries:
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mtcrf 0x80,r12
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mfspr r12,SPRN_SPRG2
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EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB)
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EXCEPTION_PROLOG_ISERIES_2
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b .do_stab_bolted
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.globl data_access_slb_iSeries
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data_access_slb_iSeries:
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mtspr SPRN_SPRG1,r13 /* save r13 */
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mfspr r13,SPRN_SPRG3 /* get paca address into r13 */
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std r3,PACA_EXSLB+EX_R3(r13)
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mfspr r3,SPRN_DAR
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std r9,PACA_EXSLB+EX_R9(r13)
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mfcr r9
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#ifdef __DISABLED__
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cmpdi r3,0
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bge slb_miss_user_iseries
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#endif
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std r10,PACA_EXSLB+EX_R10(r13)
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std r11,PACA_EXSLB+EX_R11(r13)
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std r12,PACA_EXSLB+EX_R12(r13)
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mfspr r10,SPRN_SPRG1
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std r10,PACA_EXSLB+EX_R13(r13)
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ld r12,PACALPPACAPTR(r13)
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ld r12,LPPACASRR1(r12)
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b .slb_miss_realmode
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STD_EXCEPTION_ISERIES(0x400, instruction_access, PACA_EXGEN)
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.globl instruction_access_slb_iSeries
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instruction_access_slb_iSeries:
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mtspr SPRN_SPRG1,r13 /* save r13 */
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mfspr r13,SPRN_SPRG3 /* get paca address into r13 */
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std r3,PACA_EXSLB+EX_R3(r13)
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ld r3,PACALPPACAPTR(r13)
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ld r3,LPPACASRR0(r3) /* get SRR0 value */
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std r9,PACA_EXSLB+EX_R9(r13)
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mfcr r9
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#ifdef __DISABLED__
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cmpdi r3,0
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bge .slb_miss_user_iseries
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#endif
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std r10,PACA_EXSLB+EX_R10(r13)
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std r11,PACA_EXSLB+EX_R11(r13)
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std r12,PACA_EXSLB+EX_R12(r13)
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mfspr r10,SPRN_SPRG1
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std r10,PACA_EXSLB+EX_R13(r13)
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ld r12,PACALPPACAPTR(r13)
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ld r12,LPPACASRR1(r12)
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b .slb_miss_realmode
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#ifdef __DISABLED__
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slb_miss_user_iseries:
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std r10,PACA_EXGEN+EX_R10(r13)
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std r11,PACA_EXGEN+EX_R11(r13)
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std r12,PACA_EXGEN+EX_R12(r13)
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mfspr r10,SPRG1
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ld r11,PACA_EXSLB+EX_R9(r13)
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ld r12,PACA_EXSLB+EX_R3(r13)
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std r10,PACA_EXGEN+EX_R13(r13)
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std r11,PACA_EXGEN+EX_R9(r13)
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std r12,PACA_EXGEN+EX_R3(r13)
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EXCEPTION_PROLOG_ISERIES_2
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b slb_miss_user_common
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#endif
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MASKABLE_EXCEPTION_ISERIES(0x500, hardware_interrupt)
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STD_EXCEPTION_ISERIES(0x600, alignment, PACA_EXGEN)
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STD_EXCEPTION_ISERIES(0x700, program_check, PACA_EXGEN)
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STD_EXCEPTION_ISERIES(0x800, fp_unavailable, PACA_EXGEN)
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MASKABLE_EXCEPTION_ISERIES(0x900, decrementer)
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STD_EXCEPTION_ISERIES(0xa00, trap_0a, PACA_EXGEN)
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STD_EXCEPTION_ISERIES(0xb00, trap_0b, PACA_EXGEN)
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.globl system_call_iSeries
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system_call_iSeries:
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mr r9,r13
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mfspr r13,SPRN_SPRG3
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EXCEPTION_PROLOG_ISERIES_2
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b system_call_common
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STD_EXCEPTION_ISERIES( 0xd00, single_step, PACA_EXGEN)
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STD_EXCEPTION_ISERIES( 0xe00, trap_0e, PACA_EXGEN)
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STD_EXCEPTION_ISERIES( 0xf00, performance_monitor, PACA_EXGEN)
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decrementer_iSeries_masked:
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/* We may not have a valid TOC pointer in here. */
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li r11,1
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ld r12,PACALPPACAPTR(r13)
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stb r11,LPPACADECRINT(r12)
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LOAD_REG_IMMEDIATE(r12, tb_ticks_per_jiffy)
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lwz r12,0(r12)
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mtspr SPRN_DEC,r12
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/* fall through */
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hardware_interrupt_iSeries_masked:
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mtcrf 0x80,r9 /* Restore regs */
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ld r12,PACALPPACAPTR(r13)
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ld r11,LPPACASRR0(r12)
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ld r12,LPPACASRR1(r12)
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mtspr SPRN_SRR0,r11
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mtspr SPRN_SRR1,r12
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ld r9,PACA_EXGEN+EX_R9(r13)
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ld r10,PACA_EXGEN+EX_R10(r13)
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ld r11,PACA_EXGEN+EX_R11(r13)
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ld r12,PACA_EXGEN+EX_R12(r13)
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ld r13,PACA_EXGEN+EX_R13(r13)
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rfid
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b . /* prevent speculative execution */
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#endif /* CONFIG_PPC_ISERIES */
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/*** Common interrupt handlers ***/
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STD_EXCEPTION_COMMON(0x100, system_reset, .system_reset_exception)
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@ -30,6 +30,8 @@
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#include <asm/asm-offsets.h>
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#include <asm/thread_info.h>
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#include <asm/ptrace.h>
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#include <asm/exception.h>
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#include <asm/cputable.h>
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.text
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@ -83,6 +85,140 @@ iSeries_secondary_smp_loop:
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b 1b /* If SMP not configured, secondaries
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* loop forever */
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/*** ISeries-LPAR interrupt handlers ***/
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STD_EXCEPTION_ISERIES(0x200, machine_check, PACA_EXMC)
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.globl data_access_iSeries
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data_access_iSeries:
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mtspr SPRN_SPRG1,r13
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BEGIN_FTR_SECTION
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mtspr SPRN_SPRG2,r12
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mfspr r13,SPRN_DAR
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mfspr r12,SPRN_DSISR
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srdi r13,r13,60
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rlwimi r13,r12,16,0x20
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mfcr r12
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cmpwi r13,0x2c
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beq .do_stab_bolted_iSeries
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mtcrf 0x80,r12
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mfspr r12,SPRN_SPRG2
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END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
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EXCEPTION_PROLOG_ISERIES_1(PACA_EXGEN)
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EXCEPTION_PROLOG_ISERIES_2
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b data_access_common
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.do_stab_bolted_iSeries:
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mtcrf 0x80,r12
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mfspr r12,SPRN_SPRG2
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EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB)
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EXCEPTION_PROLOG_ISERIES_2
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b .do_stab_bolted
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.globl data_access_slb_iSeries
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data_access_slb_iSeries:
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mtspr SPRN_SPRG1,r13 /* save r13 */
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mfspr r13,SPRN_SPRG3 /* get paca address into r13 */
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std r3,PACA_EXSLB+EX_R3(r13)
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mfspr r3,SPRN_DAR
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std r9,PACA_EXSLB+EX_R9(r13)
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mfcr r9
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#ifdef __DISABLED__
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cmpdi r3,0
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bge slb_miss_user_iseries
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#endif
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std r10,PACA_EXSLB+EX_R10(r13)
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std r11,PACA_EXSLB+EX_R11(r13)
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std r12,PACA_EXSLB+EX_R12(r13)
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mfspr r10,SPRN_SPRG1
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std r10,PACA_EXSLB+EX_R13(r13)
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ld r12,PACALPPACAPTR(r13)
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ld r12,LPPACASRR1(r12)
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b .slb_miss_realmode
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STD_EXCEPTION_ISERIES(0x400, instruction_access, PACA_EXGEN)
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.globl instruction_access_slb_iSeries
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instruction_access_slb_iSeries:
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mtspr SPRN_SPRG1,r13 /* save r13 */
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mfspr r13,SPRN_SPRG3 /* get paca address into r13 */
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std r3,PACA_EXSLB+EX_R3(r13)
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ld r3,PACALPPACAPTR(r13)
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ld r3,LPPACASRR0(r3) /* get SRR0 value */
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std r9,PACA_EXSLB+EX_R9(r13)
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mfcr r9
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#ifdef __DISABLED__
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cmpdi r3,0
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bge slb_miss_user_iseries
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#endif
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std r10,PACA_EXSLB+EX_R10(r13)
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std r11,PACA_EXSLB+EX_R11(r13)
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std r12,PACA_EXSLB+EX_R12(r13)
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mfspr r10,SPRN_SPRG1
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std r10,PACA_EXSLB+EX_R13(r13)
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ld r12,PACALPPACAPTR(r13)
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ld r12,LPPACASRR1(r12)
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b .slb_miss_realmode
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#ifdef __DISABLED__
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slb_miss_user_iseries:
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std r10,PACA_EXGEN+EX_R10(r13)
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std r11,PACA_EXGEN+EX_R11(r13)
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std r12,PACA_EXGEN+EX_R12(r13)
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mfspr r10,SPRG1
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ld r11,PACA_EXSLB+EX_R9(r13)
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ld r12,PACA_EXSLB+EX_R3(r13)
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std r10,PACA_EXGEN+EX_R13(r13)
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std r11,PACA_EXGEN+EX_R9(r13)
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std r12,PACA_EXGEN+EX_R3(r13)
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EXCEPTION_PROLOG_ISERIES_2
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b slb_miss_user_common
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#endif
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MASKABLE_EXCEPTION_ISERIES(0x500, hardware_interrupt)
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STD_EXCEPTION_ISERIES(0x600, alignment, PACA_EXGEN)
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STD_EXCEPTION_ISERIES(0x700, program_check, PACA_EXGEN)
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STD_EXCEPTION_ISERIES(0x800, fp_unavailable, PACA_EXGEN)
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MASKABLE_EXCEPTION_ISERIES(0x900, decrementer)
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STD_EXCEPTION_ISERIES(0xa00, trap_0a, PACA_EXGEN)
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STD_EXCEPTION_ISERIES(0xb00, trap_0b, PACA_EXGEN)
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.globl system_call_iSeries
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system_call_iSeries:
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mr r9,r13
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mfspr r13,SPRN_SPRG3
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EXCEPTION_PROLOG_ISERIES_2
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b system_call_common
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STD_EXCEPTION_ISERIES( 0xd00, single_step, PACA_EXGEN)
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STD_EXCEPTION_ISERIES( 0xe00, trap_0e, PACA_EXGEN)
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STD_EXCEPTION_ISERIES( 0xf00, performance_monitor, PACA_EXGEN)
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decrementer_iSeries_masked:
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/* We may not have a valid TOC pointer in here. */
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li r11,1
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ld r12,PACALPPACAPTR(r13)
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stb r11,LPPACADECRINT(r12)
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LOAD_REG_IMMEDIATE(r12, tb_ticks_per_jiffy)
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lwz r12,0(r12)
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mtspr SPRN_DEC,r12
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/* fall through */
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hardware_interrupt_iSeries_masked:
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mtcrf 0x80,r9 /* Restore regs */
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ld r12,PACALPPACAPTR(r13)
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ld r11,LPPACASRR0(r12)
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ld r12,LPPACASRR1(r12)
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mtspr SPRN_SRR0,r11
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mtspr SPRN_SRR1,r12
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ld r9,PACA_EXGEN+EX_R9(r13)
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ld r10,PACA_EXGEN+EX_R10(r13)
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ld r11,PACA_EXGEN+EX_R11(r13)
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ld r12,PACA_EXGEN+EX_R12(r13)
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ld r13,PACA_EXGEN+EX_R13(r13)
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rfid
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b . /* prevent speculative execution */
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_INIT_STATIC(__start_initialization_iSeries)
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/* Clear out the BSS */
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LOAD_REG_IMMEDIATE(r11,__bss_stop)
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