irqchip/gic: Return an error if GIC initialisation fails
If the GIC initialisation fails, then currently we do not return an error or clean-up afterwards. Although for root controllers, this failure may be fatal anyway, for secondary controllers, it may not be fatal and so return an error on failure and clean-up. Update the functions gic_cpu_init() and gic_pm_init() to return an error instead of calling BUG() and perform any necessary clean-up. For non-banked GIC controllers, make sure that we free any memory allocated if we fail to initialise the IRQ domain. Please note that free_percpu() only frees memory if the pointer passed to it is not NULL and so it is unnecessary to check if both pointers are valid or not. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This commit is contained in:
Jon Hunter
Marc Zyngier
Родитель
c2baa2f3f4
Коммит
dc9722cc57
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@ -467,7 +467,7 @@ static void __init gic_dist_init(struct gic_chip_data *gic)
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writel_relaxed(GICD_ENABLE, base + GIC_DIST_CTRL);
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}
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static void gic_cpu_init(struct gic_chip_data *gic)
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static int gic_cpu_init(struct gic_chip_data *gic)
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{
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void __iomem *dist_base = gic_data_dist_base(gic);
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void __iomem *base = gic_data_cpu_base(gic);
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@ -483,7 +483,9 @@ static void gic_cpu_init(struct gic_chip_data *gic)
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/*
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* Get what the GIC says our CPU mask is.
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*/
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BUG_ON(cpu >= NR_GIC_CPU_IF);
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if (WARN_ON(cpu >= NR_GIC_CPU_IF))
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return -EINVAL;
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cpu_mask = gic_get_cpumask(gic);
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gic_cpu_map[cpu] = cpu_mask;
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@ -500,6 +502,8 @@ static void gic_cpu_init(struct gic_chip_data *gic)
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writel_relaxed(GICC_INT_PRI_THRESHOLD, base + GIC_CPU_PRIMASK);
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gic_cpu_if_up(gic);
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return 0;
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}
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int gic_cpu_if_down(unsigned int gic_nr)
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@ -713,26 +717,39 @@ static struct notifier_block gic_notifier_block = {
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.notifier_call = gic_notifier,
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};
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static void __init gic_pm_init(struct gic_chip_data *gic)
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static int __init gic_pm_init(struct gic_chip_data *gic)
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{
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gic->saved_ppi_enable = __alloc_percpu(DIV_ROUND_UP(32, 32) * 4,
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sizeof(u32));
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BUG_ON(!gic->saved_ppi_enable);
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if (WARN_ON(!gic->saved_ppi_enable))
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return -ENOMEM;
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gic->saved_ppi_active = __alloc_percpu(DIV_ROUND_UP(32, 32) * 4,
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sizeof(u32));
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BUG_ON(!gic->saved_ppi_active);
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if (WARN_ON(!gic->saved_ppi_active))
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goto free_ppi_enable;
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gic->saved_ppi_conf = __alloc_percpu(DIV_ROUND_UP(32, 16) * 4,
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sizeof(u32));
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BUG_ON(!gic->saved_ppi_conf);
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if (WARN_ON(!gic->saved_ppi_conf))
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goto free_ppi_active;
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if (gic == &gic_data[0])
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cpu_pm_register_notifier(&gic_notifier_block);
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return 0;
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free_ppi_active:
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free_percpu(gic->saved_ppi_active);
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free_ppi_enable:
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free_percpu(gic->saved_ppi_enable);
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return -ENOMEM;
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}
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#else
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static void __init gic_pm_init(struct gic_chip_data *gic)
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static int __init gic_pm_init(struct gic_chip_data *gic)
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{
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return 0;
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}
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#endif
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@ -1005,13 +1022,13 @@ static const struct irq_domain_ops gic_irq_domain_ops = {
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.unmap = gic_irq_domain_unmap,
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};
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static void __init __gic_init_bases(unsigned int gic_nr, int irq_start,
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static int __init __gic_init_bases(unsigned int gic_nr, int irq_start,
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void __iomem *dist_base, void __iomem *cpu_base,
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u32 percpu_offset, struct fwnode_handle *handle)
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{
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irq_hw_number_t hwirq_base;
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struct gic_chip_data *gic;
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int gic_irqs, irq_base, i;
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int gic_irqs, irq_base, i, ret;
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BUG_ON(gic_nr >= CONFIG_ARM_GIC_MAX_NR);
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@ -1026,7 +1043,7 @@ static void __init __gic_init_bases(unsigned int gic_nr, int irq_start,
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gic->chip.irq_mask = gic_eoimode1_mask_irq;
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gic->chip.irq_eoi = gic_eoimode1_eoi_irq;
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gic->chip.irq_set_vcpu_affinity = gic_irq_set_vcpu_affinity;
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gic->chip.name = "GICv2";
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gic->chip.name = kasprintf(GFP_KERNEL, "GICv2");
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} else {
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gic->chip.name = kasprintf(GFP_KERNEL, "GIC-%d", gic_nr);
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}
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@ -1036,17 +1053,16 @@ static void __init __gic_init_bases(unsigned int gic_nr, int irq_start,
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gic->chip.irq_set_affinity = gic_set_affinity;
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#endif
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#ifdef CONFIG_GIC_NON_BANKED
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if (percpu_offset) { /* Frankein-GIC without banked registers... */
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if (IS_ENABLED(CONFIG_GIC_NON_BANKED) && percpu_offset) {
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/* Frankein-GIC without banked registers... */
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unsigned int cpu;
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gic->dist_base.percpu_base = alloc_percpu(void __iomem *);
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gic->cpu_base.percpu_base = alloc_percpu(void __iomem *);
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if (WARN_ON(!gic->dist_base.percpu_base ||
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!gic->cpu_base.percpu_base)) {
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free_percpu(gic->dist_base.percpu_base);
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free_percpu(gic->cpu_base.percpu_base);
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return;
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ret = -ENOMEM;
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goto error;
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}
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for_each_possible_cpu(cpu) {
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@ -1058,9 +1074,8 @@ static void __init __gic_init_bases(unsigned int gic_nr, int irq_start,
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}
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gic_set_base_accessor(gic, gic_get_percpu_base);
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} else
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#endif
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{ /* Normal, sane GIC... */
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} else {
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/* Normal, sane GIC... */
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WARN(percpu_offset,
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"GIC_NON_BANKED not enabled, ignoring %08x offset!",
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percpu_offset);
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@ -1110,8 +1125,10 @@ static void __init __gic_init_bases(unsigned int gic_nr, int irq_start,
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hwirq_base, &gic_irq_domain_ops, gic);
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}
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if (WARN_ON(!gic->domain))
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return;
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if (WARN_ON(!gic->domain)) {
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ret = -ENODEV;
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goto error;
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}
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if (gic_nr == 0) {
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/*
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@ -1131,8 +1148,25 @@ static void __init __gic_init_bases(unsigned int gic_nr, int irq_start,
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}
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gic_dist_init(gic);
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gic_cpu_init(gic);
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gic_pm_init(gic);
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ret = gic_cpu_init(gic);
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if (ret)
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goto error;
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ret = gic_pm_init(gic);
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if (ret)
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goto error;
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return 0;
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error:
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if (IS_ENABLED(CONFIG_GIC_NON_BANKED) && percpu_offset) {
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free_percpu(gic->dist_base.percpu_base);
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free_percpu(gic->cpu_base.percpu_base);
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}
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kfree(gic->chip.name);
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return ret;
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}
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void __init gic_init(unsigned int gic_nr, int irq_start,
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@ -1193,7 +1227,7 @@ gic_of_init(struct device_node *node, struct device_node *parent)
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void __iomem *cpu_base;
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void __iomem *dist_base;
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u32 percpu_offset;
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int irq;
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int irq, ret;
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if (WARN_ON(!node))
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return -ENODEV;
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@ -1218,8 +1252,14 @@ gic_of_init(struct device_node *node, struct device_node *parent)
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if (of_property_read_u32(node, "cpu-offset", &percpu_offset))
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percpu_offset = 0;
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__gic_init_bases(gic_cnt, -1, dist_base, cpu_base, percpu_offset,
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ret = __gic_init_bases(gic_cnt, -1, dist_base, cpu_base, percpu_offset,
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&node->fwnode);
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if (ret) {
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iounmap(dist_base);
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iounmap(cpu_base);
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return ret;
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}
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if (!gic_cnt)
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gic_init_physaddr(node);
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@ -1308,7 +1348,7 @@ static int __init gic_v2_acpi_init(struct acpi_subtable_header *header,
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struct acpi_madt_generic_distributor *dist;
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void __iomem *cpu_base, *dist_base;
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struct fwnode_handle *domain_handle;
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int count;
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int count, ret;
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/* Collect CPU base addresses */
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count = acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT,
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@ -1351,7 +1391,14 @@ static int __init gic_v2_acpi_init(struct acpi_subtable_header *header,
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return -ENOMEM;
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}
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__gic_init_bases(0, -1, dist_base, cpu_base, 0, domain_handle);
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ret = __gic_init_bases(0, -1, dist_base, cpu_base, 0, domain_handle);
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if (ret) {
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pr_err("Failed to initialise GIC\n");
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irq_domain_free_fwnode(domain_handle);
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iounmap(cpu_base);
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iounmap(dist_base);
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return ret;
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}
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acpi_set_irq_model(ACPI_IRQ_MODEL_GIC, domain_handle);
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