ARM: omap3: Thumb-2 compatibility for sleep34xx.S
* Build unconditionally as ARM for correct interoperation with OMAP firmware. * Fix an out-of-range ADR when building for ARM. * Remove deprecated PC-relative stores. * Add the required ENDPROC() directive for each ENTRY(). * .align before data words. * Handle non-interworking return from v7_flush_dcache_all. Signed-off-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Kevin Hilman <khilman@ti.com>
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dd31394779
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@ -64,6 +64,11 @@
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#define SDRC_DLLA_STATUS_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_STATUS)
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#define SDRC_DLLA_CTRL_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_CTRL)
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/*
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* This file needs be built unconditionally as ARM to interoperate correctly
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* with non-Thumb-2-capable firmware.
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*/
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.arm
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/*
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* API functions
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@ -82,6 +87,8 @@ ENTRY(get_restore_pointer)
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stmfd sp!, {lr} @ save registers on stack
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adr r0, restore
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ldmfd sp!, {pc} @ restore regs and return
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ENDPROC(get_restore_pointer)
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.align
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ENTRY(get_restore_pointer_sz)
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.word . - get_restore_pointer
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@ -91,6 +98,8 @@ ENTRY(get_omap3630_restore_pointer)
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stmfd sp!, {lr} @ save registers on stack
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adr r0, restore_3630
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ldmfd sp!, {pc} @ restore regs and return
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ENDPROC(get_omap3630_restore_pointer)
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.align
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ENTRY(get_omap3630_restore_pointer_sz)
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.word . - get_omap3630_restore_pointer
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@ -100,6 +109,8 @@ ENTRY(get_es3_restore_pointer)
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stmfd sp!, {lr} @ save registers on stack
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adr r0, restore_es3
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ldmfd sp!, {pc} @ restore regs and return
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ENDPROC(get_es3_restore_pointer)
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.align
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ENTRY(get_es3_restore_pointer_sz)
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.word . - get_es3_restore_pointer
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@ -113,8 +124,10 @@ ENTRY(enable_omap3630_toggle_l2_on_restore)
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stmfd sp!, {lr} @ save registers on stack
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/* Setup so that we will disable and enable l2 */
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mov r1, #0x1
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str r1, l2dis_3630
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adrl r2, l2dis_3630 @ may be too distant for plain adr
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str r1, [r2]
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ldmfd sp!, {pc} @ restore regs and return
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ENDPROC(enable_omap3630_toggle_l2_on_restore)
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.text
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/* Function to call rom code to save secure ram context */
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@ -139,12 +152,14 @@ ENTRY(save_secure_ram_context)
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nop
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nop
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ldmfd sp!, {r1-r12, pc}
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.align
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sram_phy_addr_mask:
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.word SRAM_BASE_P
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high_mask:
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.word 0xffff
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api_params:
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.word 0x4, 0x0, 0x0, 0x1, 0x1
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ENDPROC(save_secure_ram_context)
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ENTRY(save_secure_ram_context_sz)
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.word . - save_secure_ram_context
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@ -279,8 +294,18 @@ clean_l2:
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* - 'might' have to copy address, load and jump to it
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*/
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ldr r1, kernel_flush
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mov lr, pc
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bx r1
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blx r1
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/*
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* The kernel doesn't interwork: v7_flush_dcache_all in particluar will
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* always return in Thumb state when CONFIG_THUMB2_KERNEL is enabled.
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* This sequence switches back to ARM. Note that .align may insert a
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* nop: bx pc needs to be word-aligned in order to work.
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*/
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THUMB( .thumb )
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THUMB( .align )
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THUMB( bx pc )
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THUMB( nop )
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.arm
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omap3_do_wfi:
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ldr r4, sdrc_power @ read the SDRC_POWER register
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@ -438,6 +463,7 @@ skipl2dis:
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#endif
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b logic_l1_restore
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.align
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l2_inv_api_params:
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.word 0x1, 0x00
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l2_inv_gp:
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@ -607,6 +633,7 @@ usettbr0:
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/* This function implements the erratum ID i443 WA, applies to 34xx >= ES3.0 */
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.text
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.align 3
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ENTRY(es3_sdrc_fix)
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ldr r4, sdrc_syscfg @ get config addr
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ldr r5, [r4] @ get value
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@ -634,6 +661,7 @@ ENTRY(es3_sdrc_fix)
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str r5, [r4] @ kick off refreshes
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bx lr
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.align
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sdrc_syscfg:
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.word SDRC_SYSCONFIG_P
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sdrc_mr_0:
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@ -648,6 +676,7 @@ sdrc_emr2_1:
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.word SDRC_EMR2_1_P
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sdrc_manual_1:
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.word SDRC_MANUAL_1_P
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ENDPROC(es3_sdrc_fix)
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ENTRY(es3_sdrc_fix_sz)
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.word . - es3_sdrc_fix
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@ -682,6 +711,12 @@ wait_sdrc_ready:
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bic r5, r5, #0x40
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str r5, [r4]
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/*
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* PC-relative stores lead to undefined behaviour in Thumb-2: use a r7 as a
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* base instead.
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* Be careful not to clobber r7 when maintaing this code.
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*/
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is_dll_in_lock_mode:
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/* Is dll in lock mode? */
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ldr r4, sdrc_dlla_ctrl
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@ -689,10 +724,11 @@ is_dll_in_lock_mode:
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tst r5, #0x4
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bxne lr @ Return if locked
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/* wait till dll locks */
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adr r7, kick_counter
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wait_dll_lock_timed:
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ldr r4, wait_dll_lock_counter
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add r4, r4, #1
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str r4, wait_dll_lock_counter
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str r4, [r7, #wait_dll_lock_counter - kick_counter]
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ldr r4, sdrc_dlla_status
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/* Wait 20uS for lock */
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mov r6, #8
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@ -718,9 +754,10 @@ kick_dll:
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dsb
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ldr r4, kick_counter
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add r4, r4, #1
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str r4, kick_counter
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str r4, [r7] @ kick_counter
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b wait_dll_lock_timed
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.align
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cm_idlest1_core:
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.word CM_IDLEST1_CORE_V
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cm_idlest_ckgen:
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@ -763,6 +800,7 @@ kick_counter:
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.word 0
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wait_dll_lock_counter:
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.word 0
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ENDPROC(omap34xx_cpu_suspend)
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ENTRY(omap34xx_cpu_suspend_sz)
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.word . - omap34xx_cpu_suspend
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