[POWERPC] Fix oprofile support for e500 in arch/powerpc
Fixed a compile error in building the 85xx support with oprofile, and in the process cleaned up some issues with the fsl_booke performance monitor code. * Reorganized FSL Book-E performance monitoring code so that the 7450 wouldn't be built if the e500 was, and cleaned it up so it was more self-contained. * Added a cpu_setup function for FSL Book-E. The original cpu_setup function prototype had no arguments, assuming that the reg_setup function would copy the required information into variables which represented the registers. This was silly for e500, since it has 1 register per counter (rather than 3 for all counters), so the code has been restructured to have cpu_setup take the current counter config array as an argument, with op_powerpc_setup() invoking op_powerpc_cpu_setup() through on_each_cpu(), and op_powerpc_cpu_setup() invoking the model-specific cpu_setup function with an argument. The argument is ignored on all other platforms at present. * Fixed a confusing line where a trinary operator only had two arguments Signed-off-by: Andrew Fleming <afleming@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Andy Fleming
Paul Mackerras
Родитель
e0da0daee1
Коммит
dd6c89f686
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@ -38,7 +38,6 @@ obj-$(CONFIG_6xx) += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o
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obj-$(CONFIG_TAU) += tau_6xx.o
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obj32-$(CONFIG_SOFTWARE_SUSPEND) += swsusp_32.o
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obj32-$(CONFIG_MODULES) += module_32.o
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obj-$(CONFIG_E500) += perfmon_fsl_booke.o
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ifeq ($(CONFIG_PPC_MERGE),y)
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@ -1,221 +0,0 @@
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/* arch/powerpc/kernel/perfmon_fsl_booke.c
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* Freescale Book-E Performance Monitor code
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*
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* Author: Andy Fleming
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* Copyright (c) 2004 Freescale Semiconductor, Inc
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/stddef.h>
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#include <linux/unistd.h>
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#include <linux/ptrace.h>
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#include <linux/slab.h>
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#include <linux/user.h>
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#include <linux/a.out.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/prctl.h>
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#include <asm/pgtable.h>
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#include <asm/uaccess.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include <asm/reg.h>
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#include <asm/xmon.h>
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#include <asm/pmc.h>
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static inline u32 get_pmlca(int ctr);
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static inline void set_pmlca(int ctr, u32 pmlca);
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static inline u32 get_pmlca(int ctr)
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{
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u32 pmlca;
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switch (ctr) {
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case 0:
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pmlca = mfpmr(PMRN_PMLCA0);
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break;
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case 1:
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pmlca = mfpmr(PMRN_PMLCA1);
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break;
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case 2:
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pmlca = mfpmr(PMRN_PMLCA2);
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break;
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case 3:
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pmlca = mfpmr(PMRN_PMLCA3);
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break;
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default:
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panic("Bad ctr number\n");
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}
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return pmlca;
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}
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static inline void set_pmlca(int ctr, u32 pmlca)
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{
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switch (ctr) {
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case 0:
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mtpmr(PMRN_PMLCA0, pmlca);
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break;
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case 1:
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mtpmr(PMRN_PMLCA1, pmlca);
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break;
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case 2:
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mtpmr(PMRN_PMLCA2, pmlca);
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break;
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case 3:
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mtpmr(PMRN_PMLCA3, pmlca);
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break;
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default:
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panic("Bad ctr number\n");
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}
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}
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void init_pmc_stop(int ctr)
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{
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u32 pmlca = (PMLCA_FC | PMLCA_FCS | PMLCA_FCU |
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PMLCA_FCM1 | PMLCA_FCM0);
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u32 pmlcb = 0;
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switch (ctr) {
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case 0:
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mtpmr(PMRN_PMLCA0, pmlca);
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mtpmr(PMRN_PMLCB0, pmlcb);
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break;
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case 1:
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mtpmr(PMRN_PMLCA1, pmlca);
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mtpmr(PMRN_PMLCB1, pmlcb);
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break;
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case 2:
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mtpmr(PMRN_PMLCA2, pmlca);
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mtpmr(PMRN_PMLCB2, pmlcb);
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break;
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case 3:
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mtpmr(PMRN_PMLCA3, pmlca);
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mtpmr(PMRN_PMLCB3, pmlcb);
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break;
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default:
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panic("Bad ctr number!\n");
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}
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}
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void set_pmc_event(int ctr, int event)
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{
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u32 pmlca;
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pmlca = get_pmlca(ctr);
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pmlca = (pmlca & ~PMLCA_EVENT_MASK) |
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((event << PMLCA_EVENT_SHIFT) &
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PMLCA_EVENT_MASK);
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set_pmlca(ctr, pmlca);
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}
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void set_pmc_user_kernel(int ctr, int user, int kernel)
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{
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u32 pmlca;
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pmlca = get_pmlca(ctr);
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if(user)
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pmlca &= ~PMLCA_FCU;
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else
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pmlca |= PMLCA_FCU;
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if(kernel)
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pmlca &= ~PMLCA_FCS;
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else
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pmlca |= PMLCA_FCS;
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set_pmlca(ctr, pmlca);
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}
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void set_pmc_marked(int ctr, int mark0, int mark1)
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{
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u32 pmlca = get_pmlca(ctr);
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if(mark0)
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pmlca &= ~PMLCA_FCM0;
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else
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pmlca |= PMLCA_FCM0;
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if(mark1)
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pmlca &= ~PMLCA_FCM1;
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else
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pmlca |= PMLCA_FCM1;
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set_pmlca(ctr, pmlca);
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}
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void pmc_start_ctr(int ctr, int enable)
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{
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u32 pmlca = get_pmlca(ctr);
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pmlca &= ~PMLCA_FC;
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if (enable)
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pmlca |= PMLCA_CE;
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else
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pmlca &= ~PMLCA_CE;
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set_pmlca(ctr, pmlca);
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}
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void pmc_start_ctrs(int enable)
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{
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u32 pmgc0 = mfpmr(PMRN_PMGC0);
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pmgc0 &= ~PMGC0_FAC;
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pmgc0 |= PMGC0_FCECE;
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if (enable)
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pmgc0 |= PMGC0_PMIE;
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else
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pmgc0 &= ~PMGC0_PMIE;
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mtpmr(PMRN_PMGC0, pmgc0);
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}
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void pmc_stop_ctrs(void)
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{
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u32 pmgc0 = mfpmr(PMRN_PMGC0);
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pmgc0 |= PMGC0_FAC;
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pmgc0 &= ~(PMGC0_PMIE | PMGC0_FCECE);
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mtpmr(PMRN_PMGC0, pmgc0);
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}
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void dump_pmcs(void)
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{
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printk("pmgc0: %x\n", mfpmr(PMRN_PMGC0));
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printk("pmc\t\tpmlca\t\tpmlcb\n");
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printk("%8x\t%8x\t%8x\n", mfpmr(PMRN_PMC0),
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mfpmr(PMRN_PMLCA0), mfpmr(PMRN_PMLCB0));
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printk("%8x\t%8x\t%8x\n", mfpmr(PMRN_PMC1),
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mfpmr(PMRN_PMLCA1), mfpmr(PMRN_PMLCB1));
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printk("%8x\t%8x\t%8x\n", mfpmr(PMRN_PMC2),
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mfpmr(PMRN_PMLCA2), mfpmr(PMRN_PMLCB2));
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printk("%8x\t%8x\t%8x\n", mfpmr(PMRN_PMC3),
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mfpmr(PMRN_PMLCA3), mfpmr(PMRN_PMLCB3));
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}
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EXPORT_SYMBOL(init_pmc_stop);
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EXPORT_SYMBOL(set_pmc_event);
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EXPORT_SYMBOL(set_pmc_user_kernel);
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EXPORT_SYMBOL(set_pmc_marked);
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EXPORT_SYMBOL(pmc_start_ctr);
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EXPORT_SYMBOL(pmc_start_ctrs);
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EXPORT_SYMBOL(pmc_stop_ctrs);
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EXPORT_SYMBOL(dump_pmcs);
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@ -71,7 +71,7 @@ int reserve_pmc_hardware(perf_irq_t new_perf_irq)
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}
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pmc_owner_caller = __builtin_return_address(0);
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perf_irq = new_perf_irq ? : dummy_perf;
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perf_irq = new_perf_irq ? new_perf_irq : dummy_perf;
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out:
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spin_unlock(&pmc_owner_lock);
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@ -13,4 +13,4 @@ DRIVER_OBJS := $(addprefix ../../../drivers/oprofile/, \
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oprofile-y := $(DRIVER_OBJS) common.o backtrace.o
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oprofile-$(CONFIG_PPC64) += op_model_rs64.o op_model_power4.o
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oprofile-$(CONFIG_FSL_BOOKE) += op_model_fsl_booke.o
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oprofile-$(CONFIG_PPC32) += op_model_7450.o
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oprofile-$(CONFIG_6xx) += op_model_7450.o
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@ -34,6 +34,11 @@ static void op_handle_interrupt(struct pt_regs *regs)
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model->handle_interrupt(regs, ctr);
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}
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static void op_powerpc_cpu_setup(void *dummy)
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{
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model->cpu_setup(ctr);
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}
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static int op_powerpc_setup(void)
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{
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int err;
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@ -47,7 +52,7 @@ static int op_powerpc_setup(void)
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model->reg_setup(ctr, &sys, model->num_counters);
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/* Configure the registers on all cpus. */
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on_each_cpu(model->cpu_setup, NULL, 0, 1);
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on_each_cpu(op_powerpc_cpu_setup, NULL, 0, 1);
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return 0;
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}
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@ -142,7 +147,8 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
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case PPC_OPROFILE_POWER4:
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model = &op_model_power4;
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break;
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#else
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#endif
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#ifdef CONFIG_6xx
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case PPC_OPROFILE_G4:
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model = &op_model_7450;
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break;
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@ -81,7 +81,7 @@ static void pmc_stop_ctrs(void)
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/* Configures the counters on this CPU based on the global
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* settings */
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static void fsl7450_cpu_setup(void *unused)
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static void fsl7450_cpu_setup(struct op_counter_config *ctr)
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{
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/* freeze all counters */
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pmc_stop_ctrs();
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@ -32,42 +32,152 @@ static unsigned long reset_value[OP_MAX_COUNTER];
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static int num_counters;
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static int oprofile_running;
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static inline unsigned int ctr_read(unsigned int i)
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static void init_pmc_stop(int ctr)
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{
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switch(i) {
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u32 pmlca = (PMLCA_FC | PMLCA_FCS | PMLCA_FCU |
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PMLCA_FCM1 | PMLCA_FCM0);
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u32 pmlcb = 0;
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switch (ctr) {
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case 0:
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return mfpmr(PMRN_PMC0);
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mtpmr(PMRN_PMLCA0, pmlca);
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mtpmr(PMRN_PMLCB0, pmlcb);
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break;
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case 1:
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return mfpmr(PMRN_PMC1);
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mtpmr(PMRN_PMLCA1, pmlca);
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mtpmr(PMRN_PMLCB1, pmlcb);
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break;
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case 2:
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return mfpmr(PMRN_PMC2);
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mtpmr(PMRN_PMLCA2, pmlca);
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mtpmr(PMRN_PMLCB2, pmlcb);
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break;
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case 3:
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return mfpmr(PMRN_PMC3);
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mtpmr(PMRN_PMLCA3, pmlca);
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mtpmr(PMRN_PMLCB3, pmlcb);
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break;
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default:
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return 0;
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panic("Bad ctr number!\n");
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}
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}
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static inline void ctr_write(unsigned int i, unsigned int val)
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static void set_pmc_event(int ctr, int event)
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{
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switch(i) {
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case 0:
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mtpmr(PMRN_PMC0, val);
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break;
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case 1:
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mtpmr(PMRN_PMC1, val);
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break;
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case 2:
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mtpmr(PMRN_PMC2, val);
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break;
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case 3:
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mtpmr(PMRN_PMC3, val);
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break;
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default:
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break;
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}
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u32 pmlca;
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pmlca = get_pmlca(ctr);
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pmlca = (pmlca & ~PMLCA_EVENT_MASK) |
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((event << PMLCA_EVENT_SHIFT) &
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PMLCA_EVENT_MASK);
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set_pmlca(ctr, pmlca);
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}
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static void set_pmc_user_kernel(int ctr, int user, int kernel)
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{
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u32 pmlca;
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pmlca = get_pmlca(ctr);
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|
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if(user)
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pmlca &= ~PMLCA_FCU;
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else
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pmlca |= PMLCA_FCU;
|
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|
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if(kernel)
|
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pmlca &= ~PMLCA_FCS;
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else
|
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pmlca |= PMLCA_FCS;
|
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|
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set_pmlca(ctr, pmlca);
|
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}
|
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|
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static void set_pmc_marked(int ctr, int mark0, int mark1)
|
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{
|
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u32 pmlca = get_pmlca(ctr);
|
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|
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if(mark0)
|
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pmlca &= ~PMLCA_FCM0;
|
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else
|
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pmlca |= PMLCA_FCM0;
|
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|
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if(mark1)
|
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pmlca &= ~PMLCA_FCM1;
|
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else
|
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pmlca |= PMLCA_FCM1;
|
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|
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set_pmlca(ctr, pmlca);
|
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}
|
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|
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static void pmc_start_ctr(int ctr, int enable)
|
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{
|
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u32 pmlca = get_pmlca(ctr);
|
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|
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pmlca &= ~PMLCA_FC;
|
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|
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if (enable)
|
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pmlca |= PMLCA_CE;
|
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else
|
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pmlca &= ~PMLCA_CE;
|
||||
|
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set_pmlca(ctr, pmlca);
|
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}
|
||||
|
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static void pmc_start_ctrs(int enable)
|
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{
|
||||
u32 pmgc0 = mfpmr(PMRN_PMGC0);
|
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|
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pmgc0 &= ~PMGC0_FAC;
|
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pmgc0 |= PMGC0_FCECE;
|
||||
|
||||
if (enable)
|
||||
pmgc0 |= PMGC0_PMIE;
|
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else
|
||||
pmgc0 &= ~PMGC0_PMIE;
|
||||
|
||||
mtpmr(PMRN_PMGC0, pmgc0);
|
||||
}
|
||||
|
||||
static void pmc_stop_ctrs(void)
|
||||
{
|
||||
u32 pmgc0 = mfpmr(PMRN_PMGC0);
|
||||
|
||||
pmgc0 |= PMGC0_FAC;
|
||||
|
||||
pmgc0 &= ~(PMGC0_PMIE | PMGC0_FCECE);
|
||||
|
||||
mtpmr(PMRN_PMGC0, pmgc0);
|
||||
}
|
||||
|
||||
static void dump_pmcs(void)
|
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{
|
||||
printk("pmgc0: %x\n", mfpmr(PMRN_PMGC0));
|
||||
printk("pmc\t\tpmlca\t\tpmlcb\n");
|
||||
printk("%8x\t%8x\t%8x\n", mfpmr(PMRN_PMC0),
|
||||
mfpmr(PMRN_PMLCA0), mfpmr(PMRN_PMLCB0));
|
||||
printk("%8x\t%8x\t%8x\n", mfpmr(PMRN_PMC1),
|
||||
mfpmr(PMRN_PMLCA1), mfpmr(PMRN_PMLCB1));
|
||||
printk("%8x\t%8x\t%8x\n", mfpmr(PMRN_PMC2),
|
||||
mfpmr(PMRN_PMLCA2), mfpmr(PMRN_PMLCB2));
|
||||
printk("%8x\t%8x\t%8x\n", mfpmr(PMRN_PMC3),
|
||||
mfpmr(PMRN_PMLCA3), mfpmr(PMRN_PMLCB3));
|
||||
}
|
||||
|
||||
static void fsl_booke_cpu_setup(struct op_counter_config *ctr)
|
||||
{
|
||||
int i;
|
||||
|
||||
/* freeze all counters */
|
||||
pmc_stop_ctrs();
|
||||
|
||||
for (i = 0;i < num_counters;i++) {
|
||||
init_pmc_stop(i);
|
||||
|
||||
set_pmc_event(i, ctr[i].event);
|
||||
|
||||
set_pmc_user_kernel(i, ctr[i].user, ctr[i].kernel);
|
||||
}
|
||||
}
|
||||
|
||||
static void fsl_booke_reg_setup(struct op_counter_config *ctr,
|
||||
struct op_system_config *sys,
|
||||
|
|
@ -77,23 +187,14 @@ static void fsl_booke_reg_setup(struct op_counter_config *ctr,
|
|||
|
||||
num_counters = num_ctrs;
|
||||
|
||||
/* freeze all counters */
|
||||
pmc_stop_ctrs();
|
||||
|
||||
/* Our counters count up, and "count" refers to
|
||||
* how much before the next interrupt, and we interrupt
|
||||
* on overflow. So we calculate the starting value
|
||||
* which will give us "count" until overflow.
|
||||
* Then we set the events on the enabled counters */
|
||||
for (i = 0; i < num_counters; ++i) {
|
||||
for (i = 0; i < num_counters; ++i)
|
||||
reset_value[i] = 0x80000000UL - ctr[i].count;
|
||||
|
||||
init_pmc_stop(i);
|
||||
|
||||
set_pmc_event(i, ctr[i].event);
|
||||
|
||||
set_pmc_user_kernel(i, ctr[i].user, ctr[i].kernel);
|
||||
}
|
||||
}
|
||||
|
||||
static void fsl_booke_start(struct op_counter_config *ctr)
|
||||
|
|
@ -105,8 +206,8 @@ static void fsl_booke_start(struct op_counter_config *ctr)
|
|||
for (i = 0; i < num_counters; ++i) {
|
||||
if (ctr[i].enabled) {
|
||||
ctr_write(i, reset_value[i]);
|
||||
/* Set Each enabled counterd to only
|
||||
* count when the Mark bit is not set */
|
||||
/* Set each enabled counter to only
|
||||
* count when the Mark bit is *not* set */
|
||||
set_pmc_marked(i, 1, 0);
|
||||
pmc_start_ctr(i, 1);
|
||||
} else {
|
||||
|
|
@ -177,6 +278,7 @@ static void fsl_booke_handle_interrupt(struct pt_regs *regs,
|
|||
|
||||
struct op_powerpc_model op_model_fsl_booke = {
|
||||
.reg_setup = fsl_booke_reg_setup,
|
||||
.cpu_setup = fsl_booke_cpu_setup,
|
||||
.start = fsl_booke_start,
|
||||
.stop = fsl_booke_stop,
|
||||
.handle_interrupt = fsl_booke_handle_interrupt,
|
||||
|
|
|
|||
|
|
@ -82,7 +82,7 @@ static inline int mmcra_must_set_sample(void)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void power4_cpu_setup(void *unused)
|
||||
static void power4_cpu_setup(struct op_counter_config *ctr)
|
||||
{
|
||||
unsigned int mmcr0 = mmcr0_val;
|
||||
unsigned long mmcra = mmcra_val;
|
||||
|
|
|
|||
|
|
@ -102,7 +102,7 @@ static void rs64_reg_setup(struct op_counter_config *ctr,
|
|||
/* XXX setup user and kernel profiling */
|
||||
}
|
||||
|
||||
static void rs64_cpu_setup(void *unused)
|
||||
static void rs64_cpu_setup(struct op_counter_config *ctr)
|
||||
{
|
||||
unsigned int mmcr0;
|
||||
|
||||
|
|
|
|||
|
|
@ -42,7 +42,7 @@ struct op_powerpc_model {
|
|||
void (*reg_setup) (struct op_counter_config *,
|
||||
struct op_system_config *,
|
||||
int num_counters);
|
||||
void (*cpu_setup) (void *);
|
||||
void (*cpu_setup) (struct op_counter_config *);
|
||||
void (*start) (struct op_counter_config *);
|
||||
void (*stop) (void);
|
||||
void (*handle_interrupt) (struct pt_regs *,
|
||||
|
|
@ -121,7 +121,90 @@ static inline void ctr_write(unsigned int i, unsigned int val)
|
|||
break;
|
||||
}
|
||||
}
|
||||
#endif /* !CONFIG_FSL_BOOKE */
|
||||
#else /* CONFIG_FSL_BOOKE */
|
||||
static inline u32 get_pmlca(int ctr)
|
||||
{
|
||||
u32 pmlca;
|
||||
|
||||
switch (ctr) {
|
||||
case 0:
|
||||
pmlca = mfpmr(PMRN_PMLCA0);
|
||||
break;
|
||||
case 1:
|
||||
pmlca = mfpmr(PMRN_PMLCA1);
|
||||
break;
|
||||
case 2:
|
||||
pmlca = mfpmr(PMRN_PMLCA2);
|
||||
break;
|
||||
case 3:
|
||||
pmlca = mfpmr(PMRN_PMLCA3);
|
||||
break;
|
||||
default:
|
||||
panic("Bad ctr number\n");
|
||||
}
|
||||
|
||||
return pmlca;
|
||||
}
|
||||
|
||||
static inline void set_pmlca(int ctr, u32 pmlca)
|
||||
{
|
||||
switch (ctr) {
|
||||
case 0:
|
||||
mtpmr(PMRN_PMLCA0, pmlca);
|
||||
break;
|
||||
case 1:
|
||||
mtpmr(PMRN_PMLCA1, pmlca);
|
||||
break;
|
||||
case 2:
|
||||
mtpmr(PMRN_PMLCA2, pmlca);
|
||||
break;
|
||||
case 3:
|
||||
mtpmr(PMRN_PMLCA3, pmlca);
|
||||
break;
|
||||
default:
|
||||
panic("Bad ctr number\n");
|
||||
}
|
||||
}
|
||||
|
||||
static inline unsigned int ctr_read(unsigned int i)
|
||||
{
|
||||
switch(i) {
|
||||
case 0:
|
||||
return mfpmr(PMRN_PMC0);
|
||||
case 1:
|
||||
return mfpmr(PMRN_PMC1);
|
||||
case 2:
|
||||
return mfpmr(PMRN_PMC2);
|
||||
case 3:
|
||||
return mfpmr(PMRN_PMC3);
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void ctr_write(unsigned int i, unsigned int val)
|
||||
{
|
||||
switch(i) {
|
||||
case 0:
|
||||
mtpmr(PMRN_PMC0, val);
|
||||
break;
|
||||
case 1:
|
||||
mtpmr(PMRN_PMC1, val);
|
||||
break;
|
||||
case 2:
|
||||
mtpmr(PMRN_PMC2, val);
|
||||
break;
|
||||
case 3:
|
||||
mtpmr(PMRN_PMC3, val);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
#endif /* CONFIG_FSL_BOOKE */
|
||||
|
||||
|
||||
extern void op_powerpc_backtrace(struct pt_regs * const regs, unsigned int depth);
|
||||
|
||||
|
|
|
|||
|
|
@ -32,18 +32,5 @@ void release_pmc_hardware(void);
|
|||
void power4_enable_pmcs(void);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_FSL_BOOKE
|
||||
void init_pmc_stop(int ctr);
|
||||
void set_pmc_event(int ctr, int event);
|
||||
void set_pmc_user_kernel(int ctr, int user, int kernel);
|
||||
void set_pmc_marked(int ctr, int mark0, int mark1);
|
||||
void pmc_start_ctr(int ctr, int enable);
|
||||
void pmc_start_ctrs(int enable);
|
||||
void pmc_stop_ctrs(void);
|
||||
void dump_pmcs(void);
|
||||
|
||||
extern struct op_powerpc_model op_model_fsl_booke;
|
||||
#endif
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* _POWERPC_PMC_H */
|
||||
|
|
|
|||
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