ath9k_hw: make ath9k_phy_modify_rx_buffer() static
To do this we reorder callers in order in which they are called. Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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a776582861
Коммит
ddcd4c0818
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@ -41,10 +41,6 @@
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#include "hw.h"
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static void ath9k_phy_modify_rx_buffer(u32 *rfBuf, u32 reg32,
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u32 numBits, u32 firstBit,
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u32 column);
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/**
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* ath9k_hw_write_regs - ??
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*
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@ -433,6 +429,43 @@ void ath9k_hw_9280_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan)
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/* All code below is for non single-chip solutions */
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/**
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* ath9k_phy_modify_rx_buffer() - perform analog swizzling of parameters
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* @rfbuf:
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* @reg32:
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* @numBits:
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* @firstBit:
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* @column:
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*
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* Performs analog "swizzling" of parameters into their location.
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* Used on external AR2133/AR5133 radios.
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*/
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static void ath9k_phy_modify_rx_buffer(u32 *rfBuf, u32 reg32,
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u32 numBits, u32 firstBit,
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u32 column)
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{
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u32 tmp32, mask, arrayEntry, lastBit;
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int32_t bitPosition, bitsLeft;
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tmp32 = ath9k_hw_reverse_bits(reg32, numBits);
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arrayEntry = (firstBit - 1) / 8;
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bitPosition = (firstBit - 1) % 8;
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bitsLeft = numBits;
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while (bitsLeft > 0) {
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lastBit = (bitPosition + bitsLeft > 8) ?
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8 : bitPosition + bitsLeft;
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mask = (((1 << lastBit) - 1) ^ ((1 << bitPosition) - 1)) <<
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(column * 8);
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rfBuf[arrayEntry] &= ~mask;
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rfBuf[arrayEntry] |= ((tmp32 << bitPosition) <<
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(column * 8)) & mask;
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bitsLeft -= 8 - bitPosition;
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tmp32 = tmp32 >> (8 - bitPosition);
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bitPosition = 0;
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arrayEntry++;
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}
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}
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/*
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* Fix on 2.4 GHz band for orientation sensitivity issue by increasing
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* rf_pwd_icsyndiv.
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@ -494,6 +527,95 @@ static void ath9k_hw_force_bias(struct ath_hw *ah, u16 synth_freq)
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REG_WRITE_RF_ARRAY(&ah->iniBank6, ah->analogBank6Data, reg_writes);
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}
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/**
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* ath9k_hw_decrease_chain_power()
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*
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* @ah: atheros hardware structure
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* @chan:
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*
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* Only used on the AR5416 and AR5418 with the external AR2133/AR5133 radios.
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*
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* Sets a chain internal RF path to the lowest output power. Any
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* further writes to bank6 after this setting will override these
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* changes. Thus this function must be the last function in the
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* sequence to modify bank 6.
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*
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* This function must be called after ar5416SetRfRegs() which is
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* called from ath9k_hw_process_ini() due to swizzling of bank 6.
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* Depends on ah->analogBank6Data being initialized by
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* ath9k_hw_set_rf_regs()
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*
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* Additional additive reduction in power -
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* change chain's switch table so chain's tx state is actually the rx
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* state value. May produce different results in 2GHz/5GHz as well as
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* board to board but in general should be a reduction.
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*
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* Activated by #ifdef ALTER_SWITCH. Not tried yet. If so, must be
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* called after ah->eep_ops->set_board_values() due to RMW of
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* PHY_SWITCH_CHAIN_0.
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*/
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void ath9k_hw_decrease_chain_power(struct ath_hw *ah,
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struct ath9k_channel *chan)
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{
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int i, regWrites = 0;
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u32 bank6SelMask;
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u32 *bank6Temp = ah->bank6Temp;
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BUG_ON(AR_SREV_9280_10_OR_LATER(ah));
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switch (ah->config.diversity_control) {
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case ATH9K_ANT_FIXED_A:
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bank6SelMask =
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(ah->config.antenna_switch_swap & ANTSWAP_AB) ?
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REDUCE_CHAIN_0 : /* swapped, reduce chain 0 */
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REDUCE_CHAIN_1; /* normal, select chain 1/2 to reduce */
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break;
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case ATH9K_ANT_FIXED_B:
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bank6SelMask =
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(ah->config.antenna_switch_swap & ANTSWAP_AB) ?
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REDUCE_CHAIN_1 : /* swapped, reduce chain 1/2 */
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REDUCE_CHAIN_0; /* normal, select chain 0 to reduce */
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break;
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case ATH9K_ANT_VARIABLE:
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return; /* do not change anything */
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break;
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default:
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return; /* do not change anything */
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break;
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}
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for (i = 0; i < ah->iniBank6.ia_rows; i++)
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bank6Temp[i] = ah->analogBank6Data[i];
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/* Write Bank 5 to switch Bank 6 write to selected chain only */
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REG_WRITE(ah, AR_PHY_BASE + 0xD8, bank6SelMask);
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/*
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* Modify Bank6 selected chain to use lowest amplification.
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* Modifies the parameters to a value of 1.
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* Depends on existing bank 6 values to be cached in
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* ah->analogBank6Data
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*/
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ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 189, 0);
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ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 190, 0);
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ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 191, 0);
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ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 192, 0);
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ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 193, 0);
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ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 222, 0);
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ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 245, 0);
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ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 246, 0);
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ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 247, 0);
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REG_WRITE_RF_ARRAY(&ah->iniBank6, bank6Temp, regWrites);
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REG_WRITE(ah, AR_PHY_BASE + 0xD8, 0x00000053);
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#ifdef ALTER_SWITCH
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REG_WRITE(ah, PHY_SWITCH_CHAIN_0,
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(REG_READ(ah, PHY_SWITCH_CHAIN_0) & ~0x38)
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| ((REG_READ(ah, PHY_SWITCH_CHAIN_0) >> 3) & 0x38));
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#endif
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}
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/**
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* ath9k_hw_set_channel - tune to a channel on the external AR2133/AR5133 radios
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* @ah: atheros hardware stucture
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@ -853,43 +975,6 @@ ath9k_hw_rf_free_ext_banks(struct ath_hw *ah)
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#undef ATH_FREE_BANK
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}
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/**
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* ath9k_phy_modify_rx_buffer() - perform analog swizzling of parameters
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* @rfbuf:
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* @reg32:
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* @numBits:
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* @firstBit:
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* @column:
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*
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* Performs analog "swizzling" of parameters into their location.
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* Used on external AR2133/AR5133 radios.
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*/
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static void ath9k_phy_modify_rx_buffer(u32 *rfBuf, u32 reg32,
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u32 numBits, u32 firstBit,
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u32 column)
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{
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u32 tmp32, mask, arrayEntry, lastBit;
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int32_t bitPosition, bitsLeft;
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tmp32 = ath9k_hw_reverse_bits(reg32, numBits);
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arrayEntry = (firstBit - 1) / 8;
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bitPosition = (firstBit - 1) % 8;
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bitsLeft = numBits;
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while (bitsLeft > 0) {
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lastBit = (bitPosition + bitsLeft > 8) ?
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8 : bitPosition + bitsLeft;
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mask = (((1 << lastBit) - 1) ^ ((1 << bitPosition) - 1)) <<
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(column * 8);
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rfBuf[arrayEntry] &= ~mask;
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rfBuf[arrayEntry] |= ((tmp32 << bitPosition) <<
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(column * 8)) & mask;
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bitsLeft -= 8 - bitPosition;
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tmp32 = tmp32 >> (8 - bitPosition);
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bitPosition = 0;
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arrayEntry++;
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}
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}
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/* *
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* ath9k_hw_set_rf_regs - programs rf registers based on EEPROM
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* @ah: atheros hardware structure
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@ -979,92 +1064,3 @@ bool ath9k_hw_set_rf_regs(struct ath_hw *ah, struct ath9k_channel *chan,
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return true;
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}
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/**
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* ath9k_hw_decrease_chain_power()
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*
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* @ah: atheros hardware structure
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* @chan:
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*
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* Only used on the AR5416 and AR5418 with the external AR2133/AR5133 radios.
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*
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* Sets a chain internal RF path to the lowest output power. Any
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* further writes to bank6 after this setting will override these
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* changes. Thus this function must be the last function in the
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* sequence to modify bank 6.
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*
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* This function must be called after ar5416SetRfRegs() which is
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* called from ath9k_hw_process_ini() due to swizzling of bank 6.
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* Depends on ah->analogBank6Data being initialized by
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* ath9k_hw_set_rf_regs()
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*
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* Additional additive reduction in power -
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* change chain's switch table so chain's tx state is actually the rx
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* state value. May produce different results in 2GHz/5GHz as well as
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* board to board but in general should be a reduction.
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*
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* Activated by #ifdef ALTER_SWITCH. Not tried yet. If so, must be
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* called after ah->eep_ops->set_board_values() due to RMW of
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* PHY_SWITCH_CHAIN_0.
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*/
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void
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ath9k_hw_decrease_chain_power(struct ath_hw *ah, struct ath9k_channel *chan)
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{
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int i, regWrites = 0;
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u32 bank6SelMask;
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u32 *bank6Temp = ah->bank6Temp;
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BUG_ON(AR_SREV_9280_10_OR_LATER(ah));
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switch (ah->config.diversity_control) {
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case ATH9K_ANT_FIXED_A:
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bank6SelMask =
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(ah->config.antenna_switch_swap & ANTSWAP_AB) ?
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REDUCE_CHAIN_0 : /* swapped, reduce chain 0 */
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REDUCE_CHAIN_1; /* normal, select chain 1/2 to reduce */
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break;
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case ATH9K_ANT_FIXED_B:
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bank6SelMask =
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(ah->config.antenna_switch_swap & ANTSWAP_AB) ?
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REDUCE_CHAIN_1 : /* swapped, reduce chain 1/2 */
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REDUCE_CHAIN_0; /* normal, select chain 0 to reduce */
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break;
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case ATH9K_ANT_VARIABLE:
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return; /* do not change anything */
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break;
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default:
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return; /* do not change anything */
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break;
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}
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for (i = 0; i < ah->iniBank6.ia_rows; i++)
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bank6Temp[i] = ah->analogBank6Data[i];
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/* Write Bank 5 to switch Bank 6 write to selected chain only */
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REG_WRITE(ah, AR_PHY_BASE + 0xD8, bank6SelMask);
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/*
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* Modify Bank6 selected chain to use lowest amplification.
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* Modifies the parameters to a value of 1.
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* Depends on existing bank 6 values to be cached in
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* ah->analogBank6Data
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*/
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ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 189, 0);
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ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 190, 0);
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ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 191, 0);
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ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 192, 0);
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ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 193, 0);
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ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 222, 0);
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ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 245, 0);
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ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 246, 0);
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ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 247, 0);
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REG_WRITE_RF_ARRAY(&ah->iniBank6, bank6Temp, regWrites);
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REG_WRITE(ah, AR_PHY_BASE + 0xD8, 0x00000053);
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#ifdef ALTER_SWITCH
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REG_WRITE(ah, PHY_SWITCH_CHAIN_0,
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(REG_READ(ah, PHY_SWITCH_CHAIN_0) & ~0x38)
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| ((REG_READ(ah, PHY_SWITCH_CHAIN_0) >> 3) & 0x38));
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#endif
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}
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