irqchip/gic: Drop support for board files
With the last non-OF, non-ACPI user of the GIC being removed in
e73307b9eb
("ARM: cns3xxx: remove entire platform"), we can finally
drop the entry point and do some minor cleanup.
We also make the driver depend on CONFIG_OF, which is required
even when CONFIG_ACPI is selected.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20230315130218.3212033-1-maz@kernel.org
This commit is contained in:
Родитель
e8d018dd02
Коммит
dee234032e
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@ -7,6 +7,7 @@ config IRQCHIP
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config ARM_GIC
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bool
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depends on OF
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select IRQ_DOMAIN_HIERARCHY
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select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
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@ -1081,10 +1081,6 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq,
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return 0;
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}
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static void gic_irq_domain_unmap(struct irq_domain *d, unsigned int irq)
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{
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}
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static int gic_irq_domain_translate(struct irq_domain *d,
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struct irq_fwspec *fwspec,
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unsigned long *hwirq,
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@ -1167,11 +1163,6 @@ static const struct irq_domain_ops gic_irq_domain_hierarchy_ops = {
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.free = irq_domain_free_irqs_top,
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};
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static const struct irq_domain_ops gic_irq_domain_ops = {
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.map = gic_irq_domain_map,
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.unmap = gic_irq_domain_unmap,
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};
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static int gic_init_bases(struct gic_chip_data *gic,
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struct fwnode_handle *handle)
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{
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@ -1219,30 +1210,9 @@ static int gic_init_bases(struct gic_chip_data *gic,
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gic_irqs = 1020;
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gic->gic_irqs = gic_irqs;
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if (handle) { /* DT/ACPI */
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gic->domain = irq_domain_create_linear(handle, gic_irqs,
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&gic_irq_domain_hierarchy_ops,
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gic);
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} else { /* Legacy support */
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/*
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* For primary GICs, skip over SGIs.
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* No secondary GIC support whatsoever.
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*/
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int irq_base;
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gic_irqs -= 16; /* calculate # of irqs to allocate */
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irq_base = irq_alloc_descs(16, 16, gic_irqs,
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numa_node_id());
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if (irq_base < 0) {
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WARN(1, "Cannot allocate irq_descs @ IRQ16, assuming pre-allocated\n");
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irq_base = 16;
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}
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gic->domain = irq_domain_add_legacy(NULL, gic_irqs, irq_base,
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16, &gic_irq_domain_ops, gic);
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}
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gic->domain = irq_domain_create_linear(handle, gic_irqs,
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&gic_irq_domain_hierarchy_ops,
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gic);
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if (WARN_ON(!gic->domain)) {
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ret = -ENODEV;
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goto error;
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@ -1297,23 +1267,6 @@ static int __init __gic_init_bases(struct gic_chip_data *gic,
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return ret;
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}
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void __init gic_init(void __iomem *dist_base, void __iomem *cpu_base)
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{
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struct gic_chip_data *gic;
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/*
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* Non-DT/ACPI systems won't run a hypervisor, so let's not
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* bother with these...
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*/
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static_branch_disable(&supports_deactivate_key);
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gic = &gic_data[0];
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gic->raw_dist_base = dist_base;
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gic->raw_cpu_base = cpu_base;
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__gic_init_bases(gic, NULL);
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}
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static void gic_teardown(struct gic_chip_data *gic)
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{
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if (WARN_ON(!gic))
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@ -1325,7 +1278,6 @@ static void gic_teardown(struct gic_chip_data *gic)
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iounmap(gic->raw_cpu_base);
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}
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#ifdef CONFIG_OF
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static int gic_cnt __initdata;
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static bool gicv2_force_probe;
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@ -1570,12 +1522,6 @@ IRQCHIP_DECLARE(cortex_a7_gic, "arm,cortex-a7-gic", gic_of_init);
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IRQCHIP_DECLARE(msm_8660_qgic, "qcom,msm-8660-qgic", gic_of_init);
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IRQCHIP_DECLARE(msm_qgic2, "qcom,msm-qgic2", gic_of_init);
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IRQCHIP_DECLARE(pl390, "arm,pl390", gic_of_init);
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#else
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int gic_of_init_child(struct device *dev, struct gic_chip_data **gic, int irq)
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{
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return -ENOTSUPP;
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}
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#endif
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#ifdef CONFIG_ACPI
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static struct
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@ -151,12 +151,6 @@ int gic_of_init(struct device_node *node, struct device_node *parent);
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*/
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int gic_of_init_child(struct device *dev, struct gic_chip_data **gic, int irq);
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/*
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* Legacy platforms not converted to DT yet must use this to init
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* their GIC
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*/
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void gic_init(void __iomem *dist , void __iomem *cpu);
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void gic_send_sgi(unsigned int cpu_id, unsigned int irq);
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int gic_get_cpu_id(unsigned int cpu);
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void gic_migrate_target(unsigned int new_cpu_id);
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