UAPI: (Scripted) Disintegrate arch/tile/include/asm
Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Michael Kerrisk <mtk.manpages@gmail.com> Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: Dave Jones <davej@redhat.com>
This commit is contained in:
Родитель
43e858598a
Коммит
df842f79f0
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@ -1,10 +1,7 @@
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include include/asm-generic/Kbuild.asm
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header-y += ../arch/
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header-y += ../arch/
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header-y += cachectl.h
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header-y += ucontext.h
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header-y += ucontext.h
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header-y += hardwall.h
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generic-y += bug.h
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generic-y += bug.h
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generic-y += bugs.h
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generic-y += bugs.h
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@ -14,40 +14,11 @@
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* Provide methods for access control of per-cpu resources like
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* Provide methods for access control of per-cpu resources like
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* UDN, IDN, or IPI.
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* UDN, IDN, or IPI.
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*/
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*/
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#ifndef _ASM_TILE_HARDWALL_H
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#ifndef _ASM_TILE_HARDWALL_H
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#define _ASM_TILE_HARDWALL_H
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#define _ASM_TILE_HARDWALL_H
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#include <arch/chip.h>
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#include <uapi/asm/hardwall.h>
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#include <linux/ioctl.h>
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#define HARDWALL_IOCTL_BASE 0xa2
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/*
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* The HARDWALL_CREATE() ioctl is a macro with a "size" argument.
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* The resulting ioctl value is passed to the kernel in conjunction
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* with a pointer to a standard kernel bitmask of cpus.
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* For network resources (UDN or IDN) the bitmask must physically
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* represent a rectangular configuration on the chip.
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* The "size" is the number of bytes of cpu mask data.
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*/
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#define _HARDWALL_CREATE 1
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#define HARDWALL_CREATE(size) \
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_IOC(_IOC_READ, HARDWALL_IOCTL_BASE, _HARDWALL_CREATE, (size))
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#define _HARDWALL_ACTIVATE 2
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#define HARDWALL_ACTIVATE \
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_IO(HARDWALL_IOCTL_BASE, _HARDWALL_ACTIVATE)
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#define _HARDWALL_DEACTIVATE 3
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#define HARDWALL_DEACTIVATE \
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_IO(HARDWALL_IOCTL_BASE, _HARDWALL_DEACTIVATE)
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#define _HARDWALL_GET_ID 4
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#define HARDWALL_GET_ID \
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_IO(HARDWALL_IOCTL_BASE, _HARDWALL_GET_ID)
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#ifdef __KERNEL__
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/* /proc hooks for hardwall. */
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/* /proc hooks for hardwall. */
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struct proc_dir_entry;
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struct proc_dir_entry;
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#ifdef CONFIG_HARDWALL
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#ifdef CONFIG_HARDWALL
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@ -56,6 +27,4 @@ int proc_pid_hardwall(struct task_struct *task, char *buffer);
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#else
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#else
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static inline void proc_tile_hardwall_init(struct proc_dir_entry *root) {}
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static inline void proc_tile_hardwall_init(struct proc_dir_entry *root) {}
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#endif
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#endif
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#endif
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#endif /* _ASM_TILE_HARDWALL_H */
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#endif /* _ASM_TILE_HARDWALL_H */
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@ -11,87 +11,21 @@
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* NON INFRINGEMENT. See the GNU General Public License for
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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* more details.
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*/
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*/
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#ifndef _ASM_TILE_PTRACE_H
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#ifndef _ASM_TILE_PTRACE_H
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#define _ASM_TILE_PTRACE_H
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#define _ASM_TILE_PTRACE_H
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#include <arch/chip.h>
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#include <linux/compiler.h>
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#include <arch/abi.h>
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/* These must match struct pt_regs, below. */
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#if CHIP_WORD_SIZE() == 32
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#define PTREGS_OFFSET_REG(n) ((n)*4)
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#else
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#define PTREGS_OFFSET_REG(n) ((n)*8)
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#endif
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#define PTREGS_OFFSET_BASE 0
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#define PTREGS_OFFSET_TP PTREGS_OFFSET_REG(53)
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#define PTREGS_OFFSET_SP PTREGS_OFFSET_REG(54)
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#define PTREGS_OFFSET_LR PTREGS_OFFSET_REG(55)
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#define PTREGS_NR_GPRS 56
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#define PTREGS_OFFSET_PC PTREGS_OFFSET_REG(56)
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#define PTREGS_OFFSET_EX1 PTREGS_OFFSET_REG(57)
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#define PTREGS_OFFSET_FAULTNUM PTREGS_OFFSET_REG(58)
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#define PTREGS_OFFSET_ORIG_R0 PTREGS_OFFSET_REG(59)
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#define PTREGS_OFFSET_FLAGS PTREGS_OFFSET_REG(60)
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#if CHIP_HAS_CMPEXCH()
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#define PTREGS_OFFSET_CMPEXCH PTREGS_OFFSET_REG(61)
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#endif
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#define PTREGS_SIZE PTREGS_OFFSET_REG(64)
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#ifndef __ASSEMBLY__
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#ifndef __ASSEMBLY__
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#ifdef __KERNEL__
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/* Benefit from consistent use of "long" on all chips. */
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/* Benefit from consistent use of "long" on all chips. */
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typedef unsigned long pt_reg_t;
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typedef unsigned long pt_reg_t;
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#else
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/* Provide appropriate length type to userspace regardless of -m32/-m64. */
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typedef uint_reg_t pt_reg_t;
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#endif
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#endif
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/*
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#include <uapi/asm/ptrace.h>
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* This struct defines the way the registers are stored on the stack during a
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* system call or exception. "struct sigcontext" has the same shape.
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*/
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struct pt_regs {
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/* Saved main processor registers; 56..63 are special. */
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/* tp, sp, and lr must immediately follow regs[] for aliasing. */
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pt_reg_t regs[53];
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pt_reg_t tp; /* aliases regs[TREG_TP] */
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pt_reg_t sp; /* aliases regs[TREG_SP] */
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pt_reg_t lr; /* aliases regs[TREG_LR] */
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/* Saved special registers. */
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pt_reg_t pc; /* stored in EX_CONTEXT_K_0 */
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pt_reg_t ex1; /* stored in EX_CONTEXT_K_1 (PL and ICS bit) */
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pt_reg_t faultnum; /* fault number (INT_SWINT_1 for syscall) */
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pt_reg_t orig_r0; /* r0 at syscall entry, else zero */
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pt_reg_t flags; /* flags (see below) */
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#if !CHIP_HAS_CMPEXCH()
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pt_reg_t pad[3];
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#else
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pt_reg_t cmpexch; /* value of CMPEXCH_VALUE SPR at interrupt */
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pt_reg_t pad[2];
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#endif
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};
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#endif /* __ASSEMBLY__ */
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#define PTRACE_GETREGS 12
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#define PTRACE_SETREGS 13
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#define PTRACE_GETFPREGS 14
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#define PTRACE_SETFPREGS 15
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/* Support TILE-specific ptrace options, with events starting at 16. */
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#define PTRACE_O_TRACEMIGRATE 0x00010000
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#define PTRACE_EVENT_MIGRATE 16
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#ifdef __KERNEL__
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#define PTRACE_O_MASK_TILE (PTRACE_O_TRACEMIGRATE)
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#define PTRACE_O_MASK_TILE (PTRACE_O_TRACEMIGRATE)
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#define PT_TRACE_MIGRATE 0x00080000
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#define PT_TRACE_MIGRATE 0x00080000
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#define PT_TRACE_MASK_TILE (PT_TRACE_MIGRATE)
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#define PT_TRACE_MASK_TILE (PT_TRACE_MIGRATE)
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#endif
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#ifdef __KERNEL__
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/* Flag bits in pt_regs.flags */
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/* Flag bits in pt_regs.flags */
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#define PT_FLAGS_DISABLE_IRQ 1 /* on return to kernel, disable irqs */
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#define PT_FLAGS_DISABLE_IRQ 1 /* on return to kernel, disable irqs */
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@ -159,6 +93,4 @@ extern void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs,
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#define SINGLESTEP_STATE_TARGET_LB 2
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#define SINGLESTEP_STATE_TARGET_LB 2
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#define SINGLESTEP_STATE_TARGET_UB 7
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#define SINGLESTEP_STATE_TARGET_UB 7
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#endif /* !__KERNEL__ */
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#endif /* _ASM_TILE_PTRACE_H */
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#endif /* _ASM_TILE_PTRACE_H */
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@ -11,16 +11,13 @@
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* NON INFRINGEMENT. See the GNU General Public License for
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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* more details.
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*/
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*/
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#ifndef _ASM_TILE_SETUP_H
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#ifndef _ASM_TILE_SETUP_H
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#define _ASM_TILE_SETUP_H
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#define _ASM_TILE_SETUP_H
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#define COMMAND_LINE_SIZE 2048
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#ifdef __KERNEL__
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#include <linux/pfn.h>
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#include <linux/pfn.h>
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#include <linux/init.h>
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#include <linux/init.h>
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#include <uapi/asm/setup.h>
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/*
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/*
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* Reserved space for vmalloc and iomap - defined in asm/page.h
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* Reserved space for vmalloc and iomap - defined in asm/page.h
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@ -53,6 +50,4 @@ int hardwall_ipi_valid(int cpu);
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} while (0)
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} while (0)
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#endif
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#endif
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#endif /* __KERNEL__ */
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#endif /* _ASM_TILE_SETUP_H */
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#endif /* _ASM_TILE_SETUP_H */
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@ -11,19 +11,11 @@
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* NON INFRINGEMENT. See the GNU General Public License for
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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* more details.
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*/
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*/
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#ifndef _ASM_TILE_SIGNAL_H
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#ifndef _ASM_TILE_SIGNAL_H
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#define _ASM_TILE_SIGNAL_H
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#define _ASM_TILE_SIGNAL_H
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/* Do not notify a ptracer when this signal is handled. */
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#include <uapi/asm/signal.h>
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#define SA_NOPTRACE 0x02000000u
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/* Used in earlier Tilera releases, so keeping for binary compatibility. */
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#define SA_RESTORER 0x04000000u
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#include <asm-generic/signal.h>
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#if defined(__KERNEL__)
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#if !defined(__ASSEMBLY__)
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#if !defined(__ASSEMBLY__)
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struct pt_regs;
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struct pt_regs;
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int restore_sigcontext(struct pt_regs *, struct sigcontext __user *);
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int restore_sigcontext(struct pt_regs *, struct sigcontext __user *);
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@ -34,6 +26,4 @@ void signal_fault(const char *type, struct pt_regs *,
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void trace_unhandled_signal(const char *type, struct pt_regs *regs,
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void trace_unhandled_signal(const char *type, struct pt_regs *regs,
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unsigned long address, int signo);
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unsigned long address, int signo);
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#endif
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#endif
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#endif
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#endif /* _ASM_TILE_SIGNAL_H */
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#endif /* _ASM_TILE_SIGNAL_H */
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@ -11,32 +11,9 @@
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* NON INFRINGEMENT. See the GNU General Public License for
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* NON INFRINGEMENT. See the GNU General Public License for
|
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* more details.
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* more details.
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*/
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*/
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#if !defined(__LP64__) || defined(__SYSCALL_COMPAT)
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/* Use the flavor of this syscall that matches the 32-bit API better. */
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#define __ARCH_WANT_SYNC_FILE_RANGE2
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#endif
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/* Use the standard ABI for syscalls. */
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#include <asm-generic/unistd.h>
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/* Additional Tilera-specific syscalls. */
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#define __NR_cacheflush (__NR_arch_specific_syscall + 1)
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__SYSCALL(__NR_cacheflush, sys_cacheflush)
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#ifndef __tilegx__
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/* "Fast" syscalls provide atomic support for 32-bit chips. */
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#define __NR_FAST_cmpxchg -1
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#define __NR_FAST_atomic_update -2
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#define __NR_FAST_cmpxchg64 -3
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#define __NR_cmpxchg_badaddr (__NR_arch_specific_syscall + 0)
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__SYSCALL(__NR_cmpxchg_badaddr, sys_cmpxchg_badaddr)
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#endif
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#ifdef __KERNEL__
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/* In compat mode, we use sys_llseek() for compat_sys_llseek(). */
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/* In compat mode, we use sys_llseek() for compat_sys_llseek(). */
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#ifdef CONFIG_COMPAT
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#ifdef CONFIG_COMPAT
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#define __ARCH_WANT_SYS_LLSEEK
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#define __ARCH_WANT_SYS_LLSEEK
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#endif
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#endif
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#define __ARCH_WANT_SYS_NEWFSTATAT
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#define __ARCH_WANT_SYS_NEWFSTATAT
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#endif
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#include <uapi/asm/unistd.h>
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@ -1,3 +1,18 @@
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# UAPI Header export list
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# UAPI Header export list
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include include/uapi/asm-generic/Kbuild.asm
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include include/uapi/asm-generic/Kbuild.asm
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header-y += auxvec.h
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header-y += bitsperlong.h
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header-y += byteorder.h
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header-y += cachectl.h
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header-y += hardwall.h
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header-y += kvm_para.h
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header-y += mman.h
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header-y += ptrace.h
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header-y += setup.h
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header-y += sigcontext.h
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header-y += siginfo.h
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header-y += signal.h
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header-y += stat.h
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header-y += swab.h
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header-y += unistd.h
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@ -0,0 +1,51 @@
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/*
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||||||
|
* Copyright 2010 Tilera Corporation. All Rights Reserved.
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|
*
|
||||||
|
* This program is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License
|
||||||
|
* as published by the Free Software Foundation, version 2.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful, but
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||||||
|
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
|
||||||
|
* NON INFRINGEMENT. See the GNU General Public License for
|
||||||
|
* more details.
|
||||||
|
*
|
||||||
|
* Provide methods for access control of per-cpu resources like
|
||||||
|
* UDN, IDN, or IPI.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _UAPI_ASM_TILE_HARDWALL_H
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#define _UAPI_ASM_TILE_HARDWALL_H
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|
|
||||||
|
#include <arch/chip.h>
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#include <linux/ioctl.h>
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#define HARDWALL_IOCTL_BASE 0xa2
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|
||||||
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/*
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||||||
|
* The HARDWALL_CREATE() ioctl is a macro with a "size" argument.
|
||||||
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* The resulting ioctl value is passed to the kernel in conjunction
|
||||||
|
* with a pointer to a standard kernel bitmask of cpus.
|
||||||
|
* For network resources (UDN or IDN) the bitmask must physically
|
||||||
|
* represent a rectangular configuration on the chip.
|
||||||
|
* The "size" is the number of bytes of cpu mask data.
|
||||||
|
*/
|
||||||
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#define _HARDWALL_CREATE 1
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||||||
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#define HARDWALL_CREATE(size) \
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_IOC(_IOC_READ, HARDWALL_IOCTL_BASE, _HARDWALL_CREATE, (size))
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#define _HARDWALL_ACTIVATE 2
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||||||
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#define HARDWALL_ACTIVATE \
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||||||
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_IO(HARDWALL_IOCTL_BASE, _HARDWALL_ACTIVATE)
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||||||
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||||||
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#define _HARDWALL_DEACTIVATE 3
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||||||
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#define HARDWALL_DEACTIVATE \
|
||||||
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_IO(HARDWALL_IOCTL_BASE, _HARDWALL_DEACTIVATE)
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||||||
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|
||||||
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#define _HARDWALL_GET_ID 4
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||||||
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#define HARDWALL_GET_ID \
|
||||||
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_IO(HARDWALL_IOCTL_BASE, _HARDWALL_GET_ID)
|
||||||
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|
||||||
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|
||||||
|
#endif /* _UAPI_ASM_TILE_HARDWALL_H */
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|
@ -0,0 +1,88 @@
|
||||||
|
/*
|
||||||
|
* Copyright 2010 Tilera Corporation. All Rights Reserved.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License
|
||||||
|
* as published by the Free Software Foundation, version 2.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful, but
|
||||||
|
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
|
||||||
|
* NON INFRINGEMENT. See the GNU General Public License for
|
||||||
|
* more details.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _UAPI_ASM_TILE_PTRACE_H
|
||||||
|
#define _UAPI_ASM_TILE_PTRACE_H
|
||||||
|
|
||||||
|
#include <arch/chip.h>
|
||||||
|
#include <arch/abi.h>
|
||||||
|
|
||||||
|
/* These must match struct pt_regs, below. */
|
||||||
|
#if CHIP_WORD_SIZE() == 32
|
||||||
|
#define PTREGS_OFFSET_REG(n) ((n)*4)
|
||||||
|
#else
|
||||||
|
#define PTREGS_OFFSET_REG(n) ((n)*8)
|
||||||
|
#endif
|
||||||
|
#define PTREGS_OFFSET_BASE 0
|
||||||
|
#define PTREGS_OFFSET_TP PTREGS_OFFSET_REG(53)
|
||||||
|
#define PTREGS_OFFSET_SP PTREGS_OFFSET_REG(54)
|
||||||
|
#define PTREGS_OFFSET_LR PTREGS_OFFSET_REG(55)
|
||||||
|
#define PTREGS_NR_GPRS 56
|
||||||
|
#define PTREGS_OFFSET_PC PTREGS_OFFSET_REG(56)
|
||||||
|
#define PTREGS_OFFSET_EX1 PTREGS_OFFSET_REG(57)
|
||||||
|
#define PTREGS_OFFSET_FAULTNUM PTREGS_OFFSET_REG(58)
|
||||||
|
#define PTREGS_OFFSET_ORIG_R0 PTREGS_OFFSET_REG(59)
|
||||||
|
#define PTREGS_OFFSET_FLAGS PTREGS_OFFSET_REG(60)
|
||||||
|
#if CHIP_HAS_CMPEXCH()
|
||||||
|
#define PTREGS_OFFSET_CMPEXCH PTREGS_OFFSET_REG(61)
|
||||||
|
#endif
|
||||||
|
#define PTREGS_SIZE PTREGS_OFFSET_REG(64)
|
||||||
|
|
||||||
|
|
||||||
|
#ifndef __ASSEMBLY__
|
||||||
|
|
||||||
|
#ifndef __KERNEL__
|
||||||
|
/* Provide appropriate length type to userspace regardless of -m32/-m64. */
|
||||||
|
typedef uint_reg_t pt_reg_t;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*
|
||||||
|
* This struct defines the way the registers are stored on the stack during a
|
||||||
|
* system call or exception. "struct sigcontext" has the same shape.
|
||||||
|
*/
|
||||||
|
struct pt_regs {
|
||||||
|
/* Saved main processor registers; 56..63 are special. */
|
||||||
|
/* tp, sp, and lr must immediately follow regs[] for aliasing. */
|
||||||
|
pt_reg_t regs[53];
|
||||||
|
pt_reg_t tp; /* aliases regs[TREG_TP] */
|
||||||
|
pt_reg_t sp; /* aliases regs[TREG_SP] */
|
||||||
|
pt_reg_t lr; /* aliases regs[TREG_LR] */
|
||||||
|
|
||||||
|
/* Saved special registers. */
|
||||||
|
pt_reg_t pc; /* stored in EX_CONTEXT_K_0 */
|
||||||
|
pt_reg_t ex1; /* stored in EX_CONTEXT_K_1 (PL and ICS bit) */
|
||||||
|
pt_reg_t faultnum; /* fault number (INT_SWINT_1 for syscall) */
|
||||||
|
pt_reg_t orig_r0; /* r0 at syscall entry, else zero */
|
||||||
|
pt_reg_t flags; /* flags (see below) */
|
||||||
|
#if !CHIP_HAS_CMPEXCH()
|
||||||
|
pt_reg_t pad[3];
|
||||||
|
#else
|
||||||
|
pt_reg_t cmpexch; /* value of CMPEXCH_VALUE SPR at interrupt */
|
||||||
|
pt_reg_t pad[2];
|
||||||
|
#endif
|
||||||
|
};
|
||||||
|
|
||||||
|
#endif /* __ASSEMBLY__ */
|
||||||
|
|
||||||
|
#define PTRACE_GETREGS 12
|
||||||
|
#define PTRACE_SETREGS 13
|
||||||
|
#define PTRACE_GETFPREGS 14
|
||||||
|
#define PTRACE_SETFPREGS 15
|
||||||
|
|
||||||
|
/* Support TILE-specific ptrace options, with events starting at 16. */
|
||||||
|
#define PTRACE_O_TRACEMIGRATE 0x00010000
|
||||||
|
#define PTRACE_EVENT_MIGRATE 16
|
||||||
|
|
||||||
|
|
||||||
|
#endif /* _UAPI_ASM_TILE_PTRACE_H */
|
|
@ -0,0 +1,21 @@
|
||||||
|
/*
|
||||||
|
* Copyright 2010 Tilera Corporation. All Rights Reserved.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License
|
||||||
|
* as published by the Free Software Foundation, version 2.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful, but
|
||||||
|
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
|
||||||
|
* NON INFRINGEMENT. See the GNU General Public License for
|
||||||
|
* more details.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _UAPI_ASM_TILE_SETUP_H
|
||||||
|
#define _UAPI_ASM_TILE_SETUP_H
|
||||||
|
|
||||||
|
#define COMMAND_LINE_SIZE 2048
|
||||||
|
|
||||||
|
|
||||||
|
#endif /* _UAPI_ASM_TILE_SETUP_H */
|
|
@ -0,0 +1,27 @@
|
||||||
|
/*
|
||||||
|
* Copyright 2010 Tilera Corporation. All Rights Reserved.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License
|
||||||
|
* as published by the Free Software Foundation, version 2.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful, but
|
||||||
|
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
|
||||||
|
* NON INFRINGEMENT. See the GNU General Public License for
|
||||||
|
* more details.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _UAPI_ASM_TILE_SIGNAL_H
|
||||||
|
#define _UAPI_ASM_TILE_SIGNAL_H
|
||||||
|
|
||||||
|
/* Do not notify a ptracer when this signal is handled. */
|
||||||
|
#define SA_NOPTRACE 0x02000000u
|
||||||
|
|
||||||
|
/* Used in earlier Tilera releases, so keeping for binary compatibility. */
|
||||||
|
#define SA_RESTORER 0x04000000u
|
||||||
|
|
||||||
|
#include <asm-generic/signal.h>
|
||||||
|
|
||||||
|
|
||||||
|
#endif /* _UAPI_ASM_TILE_SIGNAL_H */
|
|
@ -0,0 +1,34 @@
|
||||||
|
/*
|
||||||
|
* Copyright 2010 Tilera Corporation. All Rights Reserved.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License
|
||||||
|
* as published by the Free Software Foundation, version 2.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful, but
|
||||||
|
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
|
||||||
|
* NON INFRINGEMENT. See the GNU General Public License for
|
||||||
|
* more details.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if !defined(__LP64__) || defined(__SYSCALL_COMPAT)
|
||||||
|
/* Use the flavor of this syscall that matches the 32-bit API better. */
|
||||||
|
#define __ARCH_WANT_SYNC_FILE_RANGE2
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Use the standard ABI for syscalls. */
|
||||||
|
#include <asm-generic/unistd.h>
|
||||||
|
|
||||||
|
/* Additional Tilera-specific syscalls. */
|
||||||
|
#define __NR_cacheflush (__NR_arch_specific_syscall + 1)
|
||||||
|
__SYSCALL(__NR_cacheflush, sys_cacheflush)
|
||||||
|
|
||||||
|
#ifndef __tilegx__
|
||||||
|
/* "Fast" syscalls provide atomic support for 32-bit chips. */
|
||||||
|
#define __NR_FAST_cmpxchg -1
|
||||||
|
#define __NR_FAST_atomic_update -2
|
||||||
|
#define __NR_FAST_cmpxchg64 -3
|
||||||
|
#define __NR_cmpxchg_badaddr (__NR_arch_specific_syscall + 0)
|
||||||
|
__SYSCALL(__NR_cmpxchg_badaddr, sys_cmpxchg_badaddr)
|
||||||
|
#endif
|
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